📄 stm32f10x_usart.lst
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\ In segment CODE, align 4, keep-with-next
127 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
128 {
\ USART_Init:
\ 00000000 30B5 PUSH {R4,R5,LR}
\ 00000002 85B0 SUB SP,SP,#+20
\ 00000004 0400 MOVS R4,R0
\ 00000006 0D00 MOVS R5,R1
129 u32 tmpreg = 0x00, apbclock = 0x00;
130 u32 integerdivider = 0x00;
131 u32 fractionaldivider = 0x00;
132 RCC_ClocksTypeDef RCC_ClocksStatus;
133
134 /* Check the parameters */
135 assert(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
136 assert(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
137 assert(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
138 assert(IS_USART_PARITY(USART_InitStruct->USART_Parity));
139 assert(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl));
140 assert(IS_USART_MODE(USART_InitStruct->USART_Mode));
141 assert(IS_USART_CLOCK(USART_InitStruct->USART_Clock));
142 assert(IS_USART_CPOL(USART_InitStruct->USART_CPOL));
143 assert(IS_USART_CPHA(USART_InitStruct->USART_CPHA));
144 assert(IS_USART_LASTBIT(USART_InitStruct->USART_LastBit));
145
146 /*---------------------------- USART CR2 Configuration -----------------------*/
147 tmpreg = USARTx->CR2;
\ 00000008 208A LDRH R0,[R4, #+16]
148 /* Clear STOP[13:12], CLKEN, CPOL, CPHA and LBCL bits */
149 tmpreg &= CR2_CLEAR_Mask;
150
151 /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
152 /* Set STOP[13:12] bits according to USART_Mode value */
153 /* Set CPOL bit according to USART_CPOL value */
154 /* Set CPHA bit according to USART_CPHA value */
155 /* Set LBCL bit according to USART_LastBit value */
156 tmpreg |= (u32)USART_InitStruct->USART_StopBits | USART_InitStruct->USART_Clock |
157 USART_InitStruct->USART_CPOL | USART_InitStruct->USART_CPHA |
158 USART_InitStruct->USART_LastBit;
159
160 /* Write to USART CR2 */
161 USARTx->CR2 = (u16)tmpreg;
\ 0000000A 2049 LDR.N R1,??USART_Init_0 ;; 0xc0ff
\ 0000000C 0140 ANDS R1,R1,R0
\ 0000000E E888 LDRH R0,[R5, #+6]
\ 00000010 0843 ORRS R0,R0,R1
\ 00000012 E989 LDRH R1,[R5, #+14]
\ 00000014 0143 ORRS R1,R1,R0
\ 00000016 288A LDRH R0,[R5, #+16]
\ 00000018 0843 ORRS R0,R0,R1
\ 0000001A 698A LDRH R1,[R5, #+18]
\ 0000001C 0143 ORRS R1,R1,R0
\ 0000001E A88A LDRH R0,[R5, #+20]
\ 00000020 0843 ORRS R0,R0,R1
\ 00000022 2082 STRH R0,[R4, #+16]
162
163 /*---------------------------- USART CR1 Configuration -----------------------*/
164 tmpreg = 0x00;
165 tmpreg = USARTx->CR1;
\ 00000024 A089 LDRH R0,[R4, #+12]
166 /* Clear M, PCE, PS, TE and RE bits */
167 tmpreg &= CR1_CLEAR_Mask;
168
169 /* Configure the USART Word Length, Parity and mode ----------------------- */
170 /* Set the M bits according to USART_WordLength value */
171 /* Set PCE and PS bits according to USART_Parity value */
172 /* Set TE and RE bits according to USART_Mode value */
173 tmpreg |= (u32)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
174 USART_InitStruct->USART_Mode;
175
176 /* Write to USART CR1 */
177 USARTx->CR1 = (u16)tmpreg;
\ 00000026 1A49 LDR.N R1,??USART_Init_0+0x4 ;; 0xe9f3
\ 00000028 0140 ANDS R1,R1,R0
\ 0000002A A888 LDRH R0,[R5, #+4]
\ 0000002C 0843 ORRS R0,R0,R1
\ 0000002E 2989 LDRH R1,[R5, #+8]
\ 00000030 0143 ORRS R1,R1,R0
\ 00000032 A889 LDRH R0,[R5, #+12]
\ 00000034 0843 ORRS R0,R0,R1
\ 00000036 A081 STRH R0,[R4, #+12]
178
179 /*---------------------------- USART CR3 Configuration -----------------------*/
180 tmpreg = 0x00;
181 tmpreg = USARTx->CR3;
\ 00000038 A08A LDRH R0,[R4, #+20]
182 /* Clear CTSE and RTSE bits */
183 tmpreg &= CR3_CLEAR_Mask;
184
185 /* Configure the USART HFC -------------------------------------------------*/
186 /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
187 tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
188
189 /* Write to USART CR3 */
190 USARTx->CR3 = (u16)tmpreg;
\ 0000003A 1649 LDR.N R1,??USART_Init_0+0x8 ;; 0xfcff
\ 0000003C 0140 ANDS R1,R1,R0
\ 0000003E 6889 LDRH R0,[R5, #+10]
\ 00000040 0843 ORRS R0,R0,R1
\ 00000042 A082 STRH R0,[R4, #+20]
191
192 /*---------------------------- USART BRR Configuration -----------------------*/
193 tmpreg = 0x00;
194
195 /* Configure the USART Baud Rate -------------------------------------------*/
196 RCC_GetClocksFreq(&RCC_ClocksStatus);
\ 00000044 6846 MOV R0,SP
\ 00000046 ........ _BLF RCC_GetClocksFreq,??RCC_GetClocksFreq??rT
197 if ((*(u32*)&USARTx) == USART1_BASE)
\ 0000004A .... LDR.N R0,??DataTable1 ;; 0x40013800
\ 0000004C 8442 CMP R4,R0
\ 0000004E 01D1 BNE.N ??USART_Init_1
198 {
199 apbclock = RCC_ClocksStatus.PCLK2_Frequency;
\ 00000050 0398 LDR R0,[SP, #+12]
\ 00000052 00E0 B.N ??USART_Init_2
200 }
201 else
202 {
203 apbclock = RCC_ClocksStatus.PCLK1_Frequency;
\ ??USART_Init_1:
\ 00000054 0298 LDR R0,[SP, #+8]
204 }
205
206 /* Determine the integer part */
207 integerdivider = ((0x19 * apbclock) / (0x04 * (USART_InitStruct->USART_BaudRate)));
\ ??USART_Init_2:
\ 00000056 1921 MOVS R1,#+25
\ 00000058 4843 MULS R0,R1,R0
\ 0000005A 2968 LDR R1,[R5, #+0]
\ 0000005C 8900 LSLS R1,R1,#+2
\ 0000005E B0FBF1F1 UDIV R1,R0,R1
208 tmpreg = (integerdivider / 0x64) << 0x04;
\ 00000062 6420 MOVS R0,#+100
\ 00000064 B1FBF0F0 UDIV R0,R1,R0
\ 00000068 0201 LSLS R2,R0,#+4
209
210 /* Determine the fractional part */
211 fractionaldivider = integerdivider - (0x64 * (tmpreg >> 0x04));
212 tmpreg |= ((((fractionaldivider * 0x10) + 0x32) / 0x64)) & ((u8)0x0F);
213
214 /* Write to USART BRR */
215 USARTx->BRR = (u16)tmpreg;
\ 0000006A 1000 MOVS R0,R2
\ 0000006C 1209 LSRS R2,R2,#+4
\ 0000006E 6423 MOVS R3,#+100
\ 00000070 02FB1311 MLS R1,R2,R3,R1
\ 00000074 0901 LSLS R1,R1,#+4
\ 00000076 3231 ADDS R1,R1,#+50
\ 00000078 1A46 MOV R2,R3
\ 0000007A B1FBF2F1 UDIV R1,R1,R2
\ 0000007E 0907 LSLS R1,R1,#+28
\ 00000080 090F LSRS R1,R1,#+28
\ 00000082 0143 ORRS R1,R1,R0
\ 00000084 2181 STRH R1,[R4, #+8]
216 }
\ 00000086 05B0 ADD SP,SP,#+20
\ 00000088 30BD POP {R4,R5,PC} ;; return
\ 0000008A 00BF Nop
\ ??USART_Init_0:
\ 0000008C FFC00000 DC32 0xc0ff
\ 00000090 F3E90000 DC32 0xe9f3
\ 00000094 FFFC0000 DC32 0xfcff
217
218 /*******************************************************************************
219 * Function Name : USART_StructInit
220 * Description : Fills each USART_InitStruct member with its default value.
221 * Input : - USART_InitStruct: pointer to a USART_InitTypeDef structure
222 * which will be initialized.
223 * Output : None
224 * Return : None
225 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
226 void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
227 {
228 /* USART_InitStruct members default value */
229 USART_InitStruct->USART_BaudRate = 0x2580; /* 9600 Baud */
\ USART_StructInit:
\ 00000000 5FF41651 MOVS R1,#+9600
\ 00000004 0160 STR R1,[R0, #+0]
230 USART_InitStruct->USART_WordLength = USART_WordLength_8b;
\ 00000006 0021 MOVS R1,#+0
\ 00000008 8180 STRH R1,[R0, #+4]
231 USART_InitStruct->USART_StopBits = USART_StopBits_1;
\ 0000000A C180 STRH R1,[R0, #+6]
232 USART_InitStruct->USART_Parity = USART_Parity_No ;
\ 0000000C 0181 STRH R1,[R0, #+8]
233 USART_InitStruct->USART_HardwareFlowControl = USART_HardwareFlowControl_None;
\ 0000000E 4181 STRH R1,[R0, #+10]
234 USART_InitStruct->USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
\ 00000010 0C22 MOVS R2,#+12
\ 00000012 8281 STRH R2,[R0, #+12]
235 USART_InitStruct->USART_Clock = USART_Clock_Disable;
\ 00000014 C181 STRH R1,[R0, #+14]
236 USART_InitStruct->USART_CPOL = USART_CPOL_Low;
\ 00000016 0182 STRH R1,[R0, #+16]
237 USART_InitStruct->USART_CPHA = USART_CPHA_1Edge;
\ 00000018 4182 STRH R1,[R0, #+18]
238 USART_InitStruct->USART_LastBit = USART_LastBit_Disable;
\ 0000001A 8182 STRH R1,[R0, #+20]
239 }
\ 0000001C 7047 BX LR ;; return
240
241 /*******************************************************************************
242 * Function Name : USART_Cmd
243 * Description : Enables or disables the specified USART peripheral.
244 * Input : - USARTx: where x can be 1, 2 or 3 to select the USART
245 * peripheral.
246 * : - NewState: new state of the USARTx peripheral.
247 * This parameter can be: ENABLE or DISABLE.
248 * Output : None
249 * Return : None
250 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
251 void USART_Cmd(USART_TypeDef* USARTx, FunctionalState NewState)
252 {
253 /* Check the parameters */
254 assert(IS_FUNCTIONAL_STATE(NewState));
255
256 if (NewState != DISABLE)
\ USART_Cmd:
\ 00000000 0029 CMP R1,#+0
\ 00000002 8189 LDRH R1,[R0, #+12]
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