📄 stm32f10x_tim1.lst
字号:
##############################################################################
# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 KICKSTART 13/Mar/2009 16:01:15 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Stack alignment = 4 #
# Source file = E:\UC_OS\Micrium\Software\CPU\ST\STM32\src\stm32f10x #
# _tim1.c #
# Command line = E:\UC_OS\Micrium\Software\CPU\ST\STM32\src\stm32f10x #
# _tim1.c -lCN E:\UC_OS\Micrium\Software\EvalBoards\ST #
# \STM3210B-EVAL\IAR\OS-Probe\Flash\List\ -o #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\Flash\Obj\ -z6 --no_unroll #
# --no_inline --no_tbaa --no_scheduling --debug #
# --cpu_mode thumb --endian little --cpu cortex-M3 #
# --stack_align 4 -e --fpu None --dlib_config #
# "C:\Program Files\IAR Systems\Embedded Workbench #
# 4.0 Kickstart\arm\LIB\dl7mptnnl8n.h" -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\ -I E:\UC_OS\Micrium\Software\EvalBoa #
# rds\ST\STM3210B-EVAL\IAR\OS-Probe\..\..\..\..\..\uco #
# s-ii\ports\arm-cortex-m3\generic\iar\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\ucos-ii\source\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uc-lib\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uc-cpu\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uc-cpu\ARM-Cortex-M3\I #
# AR\ -I E:\UC_OS\Micrium\Software\EvalBoards\ST\STM32 #
# 10B-EVAL\IAR\OS-Probe\..\..\..\..\..\cpu\st\stm32\in #
# c\ -I E:\UC_OS\Micrium\Software\EvalBoards\ST\STM321 #
# 0B-EVAL\IAR\OS-Probe\..\BSP\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uC-Probe\Target\Commun #
# ication\Generic\RS-232\Source\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uC-Probe\Target\Commun #
# ication\Generic\RS-232\Ports\ST\STM32\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uC-Probe\Target\Commun #
# ication\Generic\Source\ -I #
# E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\..\..\..\..\..\uC-Probe\Target\Plugin #
# s\uCOS-II\ -I "C:\Program Files\IAR #
# Systems\Embedded Workbench 4.0 Kickstart\arm\INC\" #
# List file = E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\Flash\List\stm32f10x_tim1.lst #
# Object file = E:\UC_OS\Micrium\Software\EvalBoards\ST\STM3210B-EVA #
# L\IAR\OS-Probe\Flash\Obj\stm32f10x_tim1.r79 #
# #
# #
##############################################################################
E:\UC_OS\Micrium\Software\CPU\ST\STM32\src\stm32f10x_tim1.c
1 /******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
2 * File Name : stm32f10x_tim1.c
3 * Author : MCD Application Team
4 * Date First Issued : 09/29/2006
5 * Description : This file provides all the TIM1 software functions.
6 ********************************************************************************
7 * History:
8 * 05/21/2007: V0.3
9 * 04/02/2007: V0.2
10 * 02/05/2007: V0.1
11 * 09/29/2006: V0.01
12 ********************************************************************************
13 * THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
14 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
15 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
16 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
17 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
18 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
19 *******************************************************************************/
20
21 /* Includes ------------------------------------------------------------------*/
22 #include "stm32f10x_tim1.h"
23 #include "stm32f10x_rcc.h"
24
25 /* Private typedef -----------------------------------------------------------*/
26 /* Private define ------------------------------------------------------------*/
27
28 /* ------------ TIM1 registers bit address in the alias region ----------- */
29 #define TIM1_OFFSET (TIM1_BASE - PERIPH_BASE)
30
31 /* --- TIM1 CR1 Register ---*/
32 /* Alias word address of CEN bit */
33 #define CR1_OFFSET (TIM1_OFFSET + 0x00)
34 #define CEN_BitNumber 0x00
35 #define CR1_CEN_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (CEN_BitNumber * 4))
36
37 /* Alias word address of UDIS bit */
38 #define UDIS_BitNumber 0x01
39 #define CR1_UDIS_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (UDIS_BitNumber * 4))
40
41 /* Alias word address of URS bit */
42 #define URS_BitNumber 0x02
43 #define CR1_URS_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (URS_BitNumber * 4))
44
45 /* Alias word address of OPM bit */
46 #define OPM_BitNumber 0x03
47 #define CR1_OPM_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (OPM_BitNumber * 4))
48
49 /* Alias word address of ARPE bit */
50 #define ARPE_BitNumber 0x07
51 #define CR1_ARPE_BB (PERIPH_BB_BASE + (CR1_OFFSET * 32) + (ARPE_BitNumber * 4))
52
53 /* --- TIM1 CR2 Register --- */
54 /* Alias word address of CCPC bit */
55 #define CR2_OFFSET (TIM1_OFFSET + 0x04)
56 #define CCPC_BitNumber 0x00
57 #define CR2_CCPC_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (CCPC_BitNumber * 4))
58
59 /* Alias word address of CCUS bit */
60 #define CCUS_BitNumber 0x02
61 #define CR2_CCUS_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (CCUS_BitNumber * 4))
62
63 /* Alias word address of CCDS bit */
64 #define CCDS_BitNumber 0x03
65 #define CR2_CCDS_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (CCDS_BitNumber * 4))
66
67 /* Alias word address of TI1S bit */
68 #define TI1S_BitNumber 0x07
69 #define CR2_TI1S_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (TI1S_BitNumber * 4))
70
71 /* Alias word address of OIS1 bit */
72 #define OIS1_BitNumber 0x08
73 #define CR2_OIS1_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS1_BitNumber * 4))
74
75 /* Alias word address of OIS1N bit */
76 #define OIS1N_BitNumber 0x09
77 #define CR2_OIS1N_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS1N_BitNumber * 4))
78
79 /* Alias word address of OIS2 bit */
80 #define OIS2_BitNumber 0x0A
81 #define CR2_OIS2_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS2_BitNumber * 4))
82
83 /* Alias word address of OIS2N bit */
84 #define OIS2N_BitNumber 0x0B
85 #define CR2_OIS2N_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS2N_BitNumber * 4))
86
87 /* Alias word address of OIS3 bit */
88 #define OIS3_BitNumber 0x0C
89 #define CR2_OIS3_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS3_BitNumber * 4))
90
91 /* Alias word address of OIS3N bit */
92 #define OIS3N_BitNumber 0x0D
93 #define CR2_OIS3N_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS3N_BitNumber * 4))
94
95 /* Alias word address of OIS4 bit */
96 #define OIS4_BitNumber 0x0E
97 #define CR2_OIS4_BB (PERIPH_BB_BASE + (CR2_OFFSET * 32) + (OIS4_BitNumber * 4))
98
99 /* --- TIM1 SMCR Register --- */
100 /* Alias word address of MSM bit */
101 #define SMCR_OFFSET (TIM1_OFFSET + 0x08)
102 #define MSM_BitNumber 0x07
103 #define SMCR_MSM_BB (PERIPH_BB_BASE + (SMCR_OFFSET * 32) + (MSM_BitNumber * 4))
104
105 /* Alias word address of ECE bit */
106 #define ECE_BitNumber 0x0E
107 #define SMCR_ECE_BB (PERIPH_BB_BASE + (SMCR_OFFSET * 32) + (ECE_BitNumber * 4))
108
109 /* --- TIM1 EGR Register --- */
110 /* Alias word address of UG bit */
111 #define EGR_OFFSET (TIM1_OFFSET + 0x14)
112 #define UG_BitNumber 0x00
113 #define EGR_UG_BB (PERIPH_BB_BASE + (EGR_OFFSET * 32) + (UG_BitNumber * 4))
114
115 /* --- TIM1 CCER Register --- */
116 /* Alias word address of CC1E bit */
117 #define CCER_OFFSET (TIM1_OFFSET + 0x20)
118 #define CC1E_BitNumber 0x00
119 #define CCER_CC1E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1E_BitNumber * 4))
120
121 /* Alias word address of CC1P bit */
122 #define CC1P_BitNumber 0x01
123 #define CCER_CC1P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1P_BitNumber * 4))
124
125 /* Alias word address of CC1NE bit */
126 #define CC1NE_BitNumber 0x02
127 #define CCER_CC1NE_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1NE_BitNumber * 4))
128
129 /* Alias word address of CC1NP bit */
130 #define CC1NP_BitNumber 0x03
131 #define CCER_CC1NP_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC1NP_BitNumber * 4))
132
133 /* Alias word address of CC2E bit */
134 #define CC2E_BitNumber 0x04
135 #define CCER_CC2E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2E_BitNumber * 4))
136
137 /* Alias word address of CC2P bit */
138 #define CC2P_BitNumber 0x05
139 #define CCER_CC2P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2P_BitNumber * 4))
140
141 /* Alias word address of CC2NE bit */
142 #define CC2NE_BitNumber 0x06
143 #define CCER_CC2NE_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2NE_BitNumber * 4))
144
145 /* Alias word address of CC2NP bit */
146 #define CC2NP_BitNumber 0x07
147 #define CCER_CC2NP_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC2NP_BitNumber * 4))
148
149 /* Alias word address of CC3E bit */
150 #define CC3E_BitNumber 0x08
151 #define CCER_CC3E_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3E_BitNumber * 4))
152
153 /* Alias word address of CC3P bit */
154 #define CC3P_BitNumber 0x09
155 #define CCER_CC3P_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3P_BitNumber * 4))
156
157 /* Alias word address of CC3NE bit */
158 #define CC3NE_BitNumber 0x0A
159 #define CCER_CC3NE_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3NE_BitNumber * 4))
160
161 /* Alias word address of CC3NP bit */
162 #define CC3NP_BitNumber 0x0B
163 #define CCER_CC3NP_BB (PERIPH_BB_BASE + (CCER_OFFSET * 32) + (CC3NP_BitNumber * 4))
164
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -