cpu.c

飞思卡尔单片机MC9SDG128B的计数器源程序

/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Cpu.C
**     Project   : Counter
**     Processor : MC9S12DG128BCPV
**     Beantype  : MC9S12DG128_112
**     Version   : Bean 01.167, Driver 01.20, CPU db: 2.87.280
**     Datasheet : 9S12DT128BDGV1/D V01.05
**     Compiler  : Metrowerks HC12 C Compiler
**     Date/Time : 2008-3-4, 下午 09:52
**     Abstract  :
**         This bean "MC9S12DG128_112" implements properties, methods,
**         and events of the CPU.
**     Settings  :
**
**     Contents  :
**         EnableInt   - void Cpu_EnableInt(void);
**         DisableInt  - void Cpu_DisableInt(void);
**         SetWaitMode - void Cpu_SetWaitMode(void);
**         SetStopMode - void Cpu_SetStopMode(void);
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2005
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : [e-mail]
** ###################################################################*/

/* MODULE Cpu. */

#include "TI1.h"
#include "Events.h"
#include "Cpu.h"

#define CGM_DELAY  1023UL

#pragma DATA_SEG DEFAULT

/* Global variables */
volatile byte CCR_reg;                 /* Current CCR reegister */
byte CpuMode = HIGH_SPEED;             /* Current speed mode */


/*
** ===================================================================
**     Method      :  Cpu_Interrupt (bean MC9S12DG128_112)
**
**     Description :
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED

ISR(Cpu_Interrupt)
{
}

#pragma CODE_SEG DEFAULT

/*
** ===================================================================
**     Method      :  Cpu_DisableInt (bean MC9S12DG128_112)
**
**     Description :
**         Disable maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_EnableInt (bean MC9S12DG128_112)
**
**     Description :
**         Enable maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetStopMode (bean MC9S12DG128_112)
**
**     Description :
**         Set low power mode - Stop mode.
**         For more information about the stop mode see
**         documentation of this CPU.
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_SetWaitMode (bean MC9S12DG128_112)
**
**     Description :
**         Set low power mode - Wait mode.
**         For more information about the wait mode see
**         documentation of this CPU.
**         Release from Wait mode: Reset or interrupt
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  _EntryPoint (bean MC9S12DG128_112)
**
**     Description :
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void _Startup(void);            /* Forward declaration of external startup function declared in file Start12.c */
#pragma CODE_SEG __NEAR_SEG NON_BANKED

#define INITRG_ADR  0x0011             /* Register map position register */

#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
  /*** ### MC9S12DG128BCPV "Cpu" init code ... ***/
  /*** PE initialization code after reset ***/
  /* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
  *(byte*)INITRG_ADR = 0;              /* Set the register map position */
  asm("nop");                          /* nop instruction */
  /* INITRM: RAM15=0,RAM14=0,RAM13=1,RAM12=0,RAM11=0,??=0,??=0,RAMHAL=0 */
  setReg8(INITRM, 32);                 /* Set the RAM map position */ 
  /* INITEE: EE15=0,EE14=0,EE13=0,EE12=1,??=1,??=0,??=0,EEON=1 */
  setReg8(INITEE, 25);                 /* Set the EEPROM map position */ 
  /* MISC: ??=0,??=0,??=0,??=0,EXSTR1=1,EXSTR0=1,ROMHM=0,ROMON=1 */
  setReg8(MISC, 13);                    
  /* EBICTL: ??=0,??=0,??=0,??=0,??=0,??=0,??=0,ESTR=0 */
  setReg8(EBICTL, 0);                   
  /* PEAR: NOACCE=0,??=0,PIPOE=0,NECLK=0,LSTRE=0,RDWE=0,??=0,??=0 */
  setReg8(PEAR, 0);                     
  /* CLKSEL: PLLSEL=0,PSTP=0,SYSWAI=0,ROAWAI=0,PLLWAI=0,CWAI=0,RTIWAI=0,COPWAI=0 */
  setReg8(CLKSEL, 0);                  /* Select clock source from XTAL and set bits in CLKSEL reg. */ 
  /*** End of PE initialization code after reset ***/
  __asm("jmp _Startup");               /* Jump to C startup code */
}

#pragma CODE_SEG DEFAULT

/*
** ===================================================================
**     Method      :  PE_low_level_init (bean MC9S12DG128_112)
**
**     Description :
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
  /* Common initialization of the CPU registers */
  /* TSCR1: TEN=0,TSWAI=0,TSFRZ=0,TFFCA=0 */
  clrReg8Bits(TSCR1, 240);              
  /* OC7M: OC7M0=0 */
  clrReg8Bits(OC7M, 1);                 
  /* TIOS: IOS0=1 */
  setReg8Bits(TIOS, 1);                 
  /* TCTL2: OM0=0,OL0=0 */
  clrReg8Bits(TCTL2, 3);                
  /* TTOV: TOV0=0 */
  clrReg8Bits(TTOV, 1);                 
  /* TSCR2: TOI=0,PR2=1,PR1=1,PR0=1 */
  clrSetReg8Bits(TSCR2, 128, 7);        
  /* TFLG1: C7F=1,C6F=1,C5F=1,C4F=1,C3F=1,C2F=1,C1F=1,C0F=1 */
  setReg8(TFLG1, 255);                  
  /* TIE: C0I=1 */
  setReg8Bits(TIE, 1);                  
  /* PWMCTL: PSWAI=0,PFRZ=0 */
  clrReg8Bits(PWMCTL, 12);              
  /* PWMSDN: PWMIF=0,PWMIE=0,PWMRSTRT=0,PWMLVL=0,??=0,PWM7IN=0,PWM7INL=0,PWM7ENA=0 */
  setReg8(PWMSDN, 0);                   
  /* ICSYS: SH37=0,SH26=0,SH15=0,SH04=0,TFMOD=0,PACMX=0,BUFEN=0,LATQ=0 */
  setReg8(ICSYS, 0);                    
  /* MCCTL: MODMC=1 */
  setReg8Bits(MCCTL, 64);               
  /* ### MC9S12DG128_112 "Cpu" init code ... */

  /* ### TimerInt "TI1" init code ... */
  /* TC0: BIT15=1,BIT14=1,BIT13=1,BIT12=1,BIT11=0,BIT10=1,BIT9=0,BIT8=0,BIT7=0,BIT6=0,BIT5=1,BIT4=0,BIT3=0,BIT2=1,BIT1=0,BIT0=0 */
  setReg16(TC0, 62500);                /* Store given value to the compare register */ 
 /* Common peripheral initialization - ENABLE */
  /* TSCR1: TEN=1 */
  setReg8Bits(TSCR1, 128);              
  /* INTCR: IRQEN=0 */
  clrReg8Bits(INTCR, 64);              /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */ 
  __EI();                              /* Enable interrupts */
}

/* END Cpu. */

/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 2.96 [03.76]
**     for the Freescale HCS12 series of microcontrollers.
**
** ###################################################################
*/