2407c.h

本文件提供了SPWM的DSP2407解决方案源程序

unsigned int *EVAIFRA 	=	(unsigned int *)0x742F;	/* Group A Interrupt Flag Register*/
unsigned int *EVAIFRB 	=	(unsigned int *)0x7430;	/* Group B Interrupt Flag Register*/
unsigned int *EVAIFRC 	=	(unsigned int *)0x7431;	/* Group C Interrupt Flag Register*/

/* Event Manager B (EVB) registers*/

unsigned int *GPTCONB 	=	(unsigned int *)0x7500;	/* GP Timer control register B */
unsigned int *T3CNT 	=	(unsigned int *)0x7501;	/* GP Timer 3 counter register */
unsigned int *T3CMPR 	=	(unsigned int *)0x7502;	/* GP Timer 3 compare register */
unsigned int *T3PR 		=	(unsigned int *)0x7503;	/* GP Timer 3 period register */
unsigned int *T3CON 	=	(unsigned int *)0x7504;	/* GP Timer 3 control register*/
unsigned int *T4CNT 	=	(unsigned int *)0x7505;	/* GP Timer 4 counter register */
unsigned int *T4CMPR 	=	(unsigned int *)0x7506;	/* GP Timer 4 compare register*/
unsigned int *T4PR 		=	(unsigned int *)0x7507;	/* GP Timer 4 period register*/
unsigned int *T4CON 	=	(unsigned int *)0x7508;	/* GP Timer 4 control register*/

unsigned int *COMCONB 	=	(unsigned int *)0x7511;	/* Compare control register B */
unsigned int *ACTRB 	=	(unsigned int *)0x7513;	/* Full compare Action control register B*/
unsigned int *DBTCONB 	=	(unsigned int *)0x7515;	/* Dead朾and timer control register B*/

unsigned int *CMPR4 	=	(unsigned int *)0x7517;	/* Full compare unit compare register4*/
unsigned int *CMPR5 	=	(unsigned int *)0x7518;	/* Full compare unit compare register5*/
unsigned int *CMPR6 	=	(unsigned int *)0x7519;	/* Full compare unit compare register6*/

unsigned int *CAPCONB 	=	(unsigned int *)0x7520;	/* Capture control register B*/
unsigned int *CAPFIFOB 	=	(unsigned int *)0x7522;	/* Capture FIFO status register B */

unsigned int *CAP4FIFO 	=	(unsigned int *)0x7523;	/* Capture Channel 4 FIFO Top*/
unsigned int *CAP5FIFO 	=	(unsigned int *)0x7524;	/* Capture Channel 5 FIFO Top*/
unsigned int *CAP6FIFO 	=	(unsigned int *)0x7525;	/* Capture Channel 6 FIFO Top */

unsigned int *CAP4FBOT 	=	(unsigned int *)0x7527;	/* Bottom reg. of capture FIFO stack 4 */
unsigned int *CAP5FBOT 	=	(unsigned int *)0x7527;	/* Bottom reg. of capture FIFO stack 5*/
unsigned int *CAP6FBOT 	=	(unsigned int *)0x7527;	/* Bottom reg. of capture FIFO stack 6*/

unsigned int *EVBIMRA 	=	(unsigned int *)0x752C;	/* Group A Interrupt Mask Register */
unsigned int *EVBIMRB 	=	(unsigned int *)0x752D;	/* Group B Interrupt Mask Register */
unsigned int *EVBIMRC 	=	(unsigned int *)0x752E;	/* Group C Interrupt Mask Register */

unsigned int *EVBIFRA 	=	(unsigned int *)0x752F;	/* Group A Interrupt Flag Register*/
unsigned int *EVBIFRB 	=	(unsigned int *)0x7530;	/* Group B Interrupt Flag Register*/
unsigned int *EVBIFRC 	=	(unsigned int *)0x7531;	/* Group C Interrupt Flag Register*/

/* CAN registers*/

unsigned int *MDER 	=	(unsigned int *)0x7100;	/* CAN Mailbox Direction/Enable register*/
unsigned int *TCR 		=	(unsigned int *)0x7101;	/* CAN Transmission Control register*/
unsigned int *RCR 		=	(unsigned int *)0x7102;	/* CAN Recieve Control register */
unsigned int *MCR 		=	(unsigned int *)0x7103;	/* CAN Master Control register */
int *BCR2 	=	(int *)0x7104;	/* CAN Bit Config register 2 */
unsigned int *BCR1 	=	(unsigned int *)0x7105;	/* CAN Bit Config register 1*/
unsigned int *ESR 		=	(unsigned int *)0x7106;	/* CAN Error Status register*/
unsigned int *GSR 		=	(unsigned int *)0x7107;	/* CAN Global Status register*/
unsigned int *CEC 		=	(unsigned int *)0x7108;	/* CAN Trans and Rcv Err counters */
unsigned int *CAN_IFR 	=	(unsigned int *)0x7109;	/* CAN Interrupt Flag Register*/
unsigned int *CAN_IMR 	=	(unsigned int *)0x710a;	/* CAN Interrupt Mask Register */
unsigned int *LAM0_H 	=	(unsigned int *)0x710b;	/* CAN Local Acceptance Mask MBX0/1 */
unsigned int *LAM0_L 	=	(unsigned int *)0x710c;	/* CAN Local Acceptance Mask MBX0/1*/
unsigned int *LAM1_H 	=	(unsigned int *)0x710d;	/* CAN Local Acceptance Mask MBX2/3 */
unsigned int *LAM1_L 	=	(unsigned int *)0x710e;	/* CAN Local Acceptance Mask MBX2/3*/

unsigned int *MSGID0L 	=	(unsigned int *)0x7200;	/* CAN Message ID for mailbox 0 (lower 16 bits)*/
unsigned int *MSGID0H 	=	(unsigned int *)0x7201;	/* CAN Message ID for mailbox 0 (upper 16 bits)*/
unsigned int *MSGCTRL0 	=	(unsigned int *)0x7202;	/* CAN RTR and DLC*/
unsigned int *MBX0A 	=	(unsigned int *)0x7204;	/* CAN 2 of 8 bytes of Mailbox 0*/
unsigned int *MBX0B 	=	(unsigned int *)0x7205;	/* CAN 2 of 8 bytes of Mailbox 0*/
unsigned int *MBX0C 	=	(unsigned int *)0x7206;	/* CAN 2 of 8 bytes of Mailbox 0 */
unsigned int *MBX0D 	=	(unsigned int *)0x7207;	/* CAN 2 of 8 bytes of Mailbox 0 */

unsigned int *MSGID1L 	=	(unsigned int *)0x7208;	/* CAN Message ID for mailbox 1 (lower 16 bits)*/
unsigned int *MSGID1H 	=	(unsigned int *)0x7209;	/* CAN Message ID for mailbox 1 (upper 16 bits)*/
unsigned int *MSGCTRL1 	=	(unsigned int *)0x720A;	/* CAN RTR and DLC*/
unsigned int *MBX1A 	=	(unsigned int *)0x720C;	/* CAN 2 of 8 bytes of Mailbox 1*/
unsigned int *MBX1B 	=	(unsigned int *)0x720D;	/* CAN 2 of 8 bytes of Mailbox 1*/
unsigned int *MBX1C 	=	(unsigned int *)0x720E;	/* CAN 2 of 8 bytes of Mailbox 1*/
unsigned int *MBX1D 	=	(unsigned int *)0x720F;	/* CAN 2 of 8 bytes of Mailbox 1*/

unsigned int *MSGID2L 	=	(unsigned int *)0x7210;	/* CAN Message ID for mailbox 2 (lower 16 bits)*/
unsigned int *MSGID2H 	=	(unsigned int *)0x7211;	/* CAN Message ID for mailbox 2 (upper 16 bits)*/
unsigned int *MSGCTRL2 	=	(unsigned int *)0x7212;	/* CAN RTR and DLC */
unsigned int *MBX2A		=	(unsigned int *)0x7214;	/* CAN 2 of 8 bytes of Mailbox 2*/
unsigned int *MBX2B 	=	(unsigned int *)0x7215;	/* CAN 2 of 8 bytes of Mailbox 2*/
unsigned int *MBX2C 	=	(unsigned int *)0x7216;	/* CAN 2 of 8 bytes of Mailbox 2*/
unsigned int *MBX2D 	=	(unsigned int *)0x7217;	/* CAN 2 of 8 bytes of Mailbox 2*/

unsigned int *MSGID3L 	=	(unsigned int *)0x7218;	/* CAN Message ID for mailbox 3 (lower 16 bits)*/
unsigned int *MSGID3H 	=	(unsigned int *)0x7219;	/* CAN Message ID for mailbox 3 (upper 16 bits)*/
unsigned int *MSGCTRL3 	=	(unsigned int *)0x721A;	/* CAN RTR and DLC*/
unsigned int *MBX3A 	=	(unsigned int *)0x721C;	/* CAN 2 of 8 bytes of Mailbox 3 */
unsigned int *MBX3B 	=	(unsigned int *)0x721D;	/* CAN 2 of 8 bytes of Mailbox 3 */
unsigned int *MBX3C 	=	(unsigned int *)0x721E;	/* CAN 2 of 8 bytes of Mailbox 3*/
unsigned int *MBX3D 	=	(unsigned int *)0x721F;	/* CAN 2 of 8 bytes of Mailbox 3 */

unsigned int *MSGID4L 	=	(unsigned int *)0x7220;	/* CAN Message ID for mailbox 4 (lower 16 bits)*/
unsigned int *MSGID4H 	=	(unsigned int *)0x7221;	/* CAN Message ID for mailbox 4 (upper 16 bits)*/
unsigned int *MSGCTRL4 	=	(unsigned int *)0x7222;	/* CAN RTR and DLC*/
unsigned int *MBX4A 	=	(unsigned int *)0x7224;	/* CAN 2 of 8 bytes of Mailbox 4*/
unsigned int *MBX4B 	=	(unsigned int *)0x7225;	/* CAN 2 of 8 bytes of Mailbox 4*/
unsigned int *MBX4C 	=	(unsigned int *)0x7226;	/* CAN 2 of 8 bytes of Mailbox 4*/
unsigned int *MBX4D 	=	(unsigned int *)0x7227;	/* CAN 2 of 8 bytes of Mailbox 4*/

unsigned int *MSGID5L 	=	(unsigned int *)0x7228;	/* CAN Message ID for mailbox 5 (lower 16 bits)*/
unsigned int *MSGID5H 	=	(unsigned int *)0x7229;	/* CAN Message ID for mailbox 5 (upper 16 bits)*/
unsigned int *MSGCTRL5 	=	(unsigned int *)0x722A;	/* CAN RTR and DLC*/
unsigned int *MBX5A 	=	(unsigned int *)0x722C;	/* CAN 2 of 8 bytes of Mailbox 5 */
unsigned int *MBX5B 	=	(unsigned int *)0x722D;	/* CAN 2 of 8 bytes of Mailbox 5 */
unsigned int *MBX5C 	=	(unsigned int *)0x722E;	/* CAN 2 of 8 bytes of Mailbox 5 */
unsigned int *MBX5D 	=	(unsigned int *)0x722F;	/* CAN 2 of 8 bytes of Mailbox 5 */

/*--------------------------------------------------- */
/*I/O space mapped registers  */
/*--------------------------------------------------- */

unsigned int *WSGR 		=	(unsigned int *)0x0FFFF;	/* Wait朣tate Generator Control register */
unsigned int *FCMR 		=	(unsigned int *)0x0FF0F;	/* Flash control mode register */

/*--------------------------------------------------- */
/*Bit codes for Test bit instruction (BIT) (15 Loads bit 0 into TC)*/
/*---------------------------------------------------*/
#define BIT15 		  0x0000;	/* Bit Code for 15*/
#define BIT14 		  0x0001;	/* Bit Code for 14*/
#define BIT13 		  0x0002;	/* Bit Code for 13*/
#define BIT12 		  0x0003;	/* Bit Code for 12*/
#define BIT11 		  0x0004;	/* Bit Code for 11*/
#define BIT10 		  0x0005;	/* Bit Code for 10 */
#define BIT9 		  0x0006;	/* Bit Code for 9 */
#define BIT8 		  0x0007;	/* Bit Code for 8 */
#define BIT7 		  0x0008;	/* Bit Code for 7 */
#define BIT6 		  0x0009;	/* Bit Code for 6 */
#define BIT5 		  0x000A;	/* Bit Code for 5*/
#define BIT4 		  0x000B;	/* Bit Code for 4 */
#define BIT3 		  0x000C;	/* Bit Code for 3 */
#define BIT2 		  0x000D;	/* Bit Code for 2*/
#define BIT1 		  0x000E;	/* Bit Code for 1*/
#define BIT0 		  0x000F;	/* Bit Code for 0*/