emif_com.bld

来自「实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口」· BLD 代码 · 共 33 行

BLD

33 行

Release 9.1i ngdbuild J.30Copyright (c) 1995-2007 Xilinx, Inc.  All rights reserved.Command Line: D:\EDA\Xilinx91i\bin\nt\ngdbuild.exe -ise
E:/ISE_Prj/EMIF_COM/EMIF_COM.ise -intstyle ise -dd _ngo -nt timestamp -uc
EMIF_COM.ucf -p xc2s200-pq208-5 EMIF_COM.edn EMIF_COM.ngdReading module "EMIF_COM.ngo" ( "EMIF_COM.ngo" unchanged since last run )...Reading NGO file "E:/ISE_Prj/EMIF_COM/_ngo/EMIF_COM.ngo" ...Applying constraints in "EMIF_COM.ucf" to the design...Checking timing specifications ...Checking Partitions ...Checking expanded design ...Partition Implementation Status-------------------------------  No Partitions were found in this design.-------------------------------NGDBUILD Design Results Summary:  Number of errors:     0  Number of warnings:   0Total memory usage is 68572 kilobytesWriting NGD file "EMIF_COM.ngd" ...Writing NGDBUILD log file "EMIF_COM.bld"...

emif_com.bld - 源码说明

本页面展示了「实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口」中的 emif_com.bld 源码文件，采用 BLD 编程语言编写，共 33 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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