_info

实现FPGA与DSP之间通信的接口,利用DSP的标准EMIF接口

m255
13
cModel Technology
dE:\ISE_Prj\EMIF_COM
vEMIF_COM
Im8:ZM_DPZcf2gO_N<Y<EU2
V3YT0F<A0]elF`JQ5EWfWk0
dE:\ISE_Prj\EMIF_COM
w1238142841
FEMIF_COM.v
L0 21
V3YT0F<A0]elF`JQ5EWfWk0
OE;L;6.2b;35
r1
31
n@e@m@i@f_@c@o@m
vglbl
IT?5S;>bN`@zG_25]R_4A33
VnN]4Gon>inod6>M^M2[SV1
dE:\ISE_Prj\EMIF_COM
w1165016690
FD:/EDA/Xilinx91i/verilog/src/glbl.v
L0 5
VnN]4Gon>inod6>M^M2[SV1
OE;L;6.2b;35
r1
31
vTest
I2?JfH`WFEV]ZM;j3;Z18T1
VN76nzH=a2Li@MdB0kO;R@3
dE:\ISE_Prj\EMIF_COM
w1238139324
FTest.tfw
L0 21
VN76nzH=a2Li@MdB0kO;R@3
OE;L;6.2b;35
r1
31
n@test