📄 dec6713_eeprom.c
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/*********************************************************************************
* DEC6713_EEPROM.C v1.00 *
* Copyright 2003 by SEED Electronic Technology Ltd.
* All rights reserved. Property of SEED Electronic Technology Ltd. *
* Designed by: Hongshuai.Li *
*********************************************************************************/
/********************************************************************************\
\* The routine illustrates the using method of TMS320C6713 IIC. In this example,*\
\*Writting and reading operation on EEPROM AT24C256 are related. *\
\********************************************************************************/
#include <csl.h>
#include <csl_mcasp.h>
#include <csl_i2c.h>
#include <csl_emif.h>
#include <csl_pll.h>
#include <stdio.h>
#include "DEC6713.h"
#include "IIC.h"
/********************************************************************************/
/* Set I2C registers. */
I2C_Config MyI2CCfgT = {
I2C_FMKS(I2COAR,A,OF(0x00)), //Not used if master.
I2C_FMKS(I2CIMR,ICXRDY,MSK) |
I2C_FMKS(I2CIMR,ICRRDY,MSK) |
I2C_FMKS(I2CIMR,ARDY,MSK) |
I2C_FMKS(I2CIMR,NACK,MSK) |
I2C_FMKS(I2CIMR,AL,MSK),
// Master clock frequency is 200kHz(SYSCLK2 is 150MHz).
I2C_FMKS(I2CCLKL,ICCL,OF(14)),
I2C_FMKS(I2CCLKH,ICCH,OF(14)),
I2C_FMKS(I2CCNT,ICDC,OF(6)),
I2C_FMKS(I2CSAR,A,OF(80)),
I2C_FMKS(I2CMDR,FREE,RFREE) |
I2C_FMKS(I2CMDR,STT,START) |
I2C_FMKS(I2CMDR,STP,STOP) |
I2C_FMKS(I2CMDR,MST,MASTER) |
I2C_FMKS(I2CMDR,TRX,XMT) |
I2C_FMKS(I2CMDR,XA,7BIT) |
I2C_FMKS(I2CMDR,RM,NONE) |
I2C_FMKS(I2CMDR,DLB,NONE) |
I2C_FMKS(I2CMDR,IRS,NRST) |
I2C_FMKS(I2CMDR,STB,NONE), //???
I2C_FMKS(I2CPSC,IPSC,OF(15-1)) // 10MHz
};
I2C_Config MyI2CCfgR = {
I2C_FMKS(I2COAR,A,OF(0x00)),
I2C_FMKS(I2CIMR,ICXRDY,MSK) |
I2C_FMKS(I2CIMR,ICRRDY,MSK) |
I2C_FMKS(I2CIMR,ARDY,MSK) |
I2C_FMKS(I2CIMR,NACK,MSK) |
I2C_FMKS(I2CIMR,AL,MSK),
// Master clock frequency is 200kHz(SYSCLK2 is 150MHz).
I2C_FMKS(I2CCLKL,ICCL,OF(14)),
I2C_FMKS(I2CCLKH,ICCH,OF(14)),
I2C_FMKS(I2CCNT,ICDC,OF(4)),
I2C_FMKS(I2CSAR,A,OF(80)),
I2C_FMKS(I2CMDR,FREE,RFREE) |
I2C_FMKS(I2CMDR,STT,START) |
I2C_FMKS(I2CMDR,STP,STOP) |
I2C_FMKS(I2CMDR,MST,MASTER) |
I2C_FMKS(I2CMDR,TRX,RCV) |
I2C_FMKS(I2CMDR,XA,7BIT) |
I2C_FMKS(I2CMDR,RM,NONE) |
I2C_FMKS(I2CMDR,DLB,NONE) |
I2C_FMKS(I2CMDR,IRS,NRST) |
I2C_FMKS(I2CMDR,STB,NONE), //???
I2C_FMKS(I2CPSC,IPSC,OF(15-1)) // 10MHz
};
/********************************************************************************/
I2C_Handle hI2C;
Uint8 DataByte[4] = {0x21,0x02,0x05,0x20};
Uint8 DataByteE[4] = {0xFF,0xFF,0xFF,0xFF};
Uint8 ReceiveData[4] = {0,0,0,0};
Uint8 Length = 4;
extern far void vectors();
main()
{
Uint8 i;
/* Initialize CLS, must when using csl. */
CSL_init();
/* Initialize DEC6713 board. */
DEC6713_init();
IRQ_setVecs(vectors);
IRQ_nmiEnable();
IRQ_globalEnable();
//start added on 2005.2.21
/* Open I2C0. */
hI2C = I2C_open(I2C_DEV0,I2C_OPEN_RESET);
waitForBusFree(hI2C);
I2C_config(hI2C,&MyI2CCfgT);
/* Write word address to AT24C256. */
I2C_writeByte(hI2C,0x00);
I2C_start(hI2C);
while(!I2C_xrdy(hI2C));
I2C_writeByte(hI2C,0x00);
/* Writting data to AT24C256. */
for(i=0;i<Length;i++)
{
while(!I2C_xrdy(hI2C));
I2C_writeByte(hI2C,DataByteE[i]);
}
I2C_sendStop(hI2C);
waitForBusFree(hI2C);
DEC6713_waitusec(10000);
MyI2CCfgT.i2ccnt = 2;
I2C_config(hI2C,&MyI2CCfgT);
/* Perform dummy write operation. */
I2C_writeByte(hI2C,0x00);
I2C_start(hI2C);
while(!I2C_xrdy(hI2C));
I2C_writeByte(hI2C,0x00);
I2C_sendStop(hI2C);
waitForBusFree(hI2C);
DEC6713_waitusec(10000);
/* Reading data from AT24C256. */
I2C_config(hI2C,&MyI2CCfgR);
DEC6713_wait(200);
I2C_start(hI2C);
for(i=0;i<Length;i++)
{
while(!I2C_rrdy(hI2C));
ReceiveData[i] =I2C_readByte(hI2C);
}
I2C_sendStop(hI2C);
// printf("\nReading data is over.");
/* Comparing data. */
for(i=0;i<Length;i++)
{
if(ReceiveData[i] != DataByteE[i])
{
printf("\nErasing is failure.");
exit(0);
}
}
// printf("\nErasing is success.");
I2C_FSETH(hI2C,I2CSTR,BB,1);
I2C_reset(hI2C);
I2C_close(hI2C);
DEC6713_waitusec(10000);
//end added on 2005.2.21
/* Open I2C0. */
hI2C = I2C_open(I2C_DEV0,I2C_OPEN_RESET);
waitForBusFree(hI2C);
MyI2CCfgT.i2ccnt = 6; //added on 2005.02.21
I2C_config(hI2C,&MyI2CCfgT);
/* Write word address to AT24C256. */
I2C_writeByte(hI2C,0x00);
I2C_start(hI2C);
while(!I2C_xrdy(hI2C));
I2C_writeByte(hI2C,0x00);
/* Writting data to AT24C256. */
for(i=0;i<Length;i++)
{
while(!I2C_xrdy(hI2C));
I2C_writeByte(hI2C,DataByte[i]);
}
I2C_sendStop(hI2C);
waitForBusFree(hI2C);
DEC6713_waitusec(10000);
MyI2CCfgT.i2ccnt = 2;
I2C_config(hI2C,&MyI2CCfgT);
/* Perform dummy write operation. */
I2C_writeByte(hI2C,0x00);
I2C_start(hI2C);
while(!I2C_xrdy(hI2C));
I2C_writeByte(hI2C,0x00);
I2C_sendStop(hI2C);
waitForBusFree(hI2C);
DEC6713_waitusec(10000);
/* Reading data from AT24C256. */
I2C_config(hI2C,&MyI2CCfgR);
DEC6713_wait(200);
I2C_start(hI2C);
for(i=0;i<Length;i++)
{
while(!I2C_rrdy(hI2C));
ReceiveData[i] =I2C_readByte(hI2C);
}
I2C_sendStop(hI2C);
/* Comparing data. */
for(i=0;i<Length;i++)
{
if(ReceiveData[i] != DataByte[i])
{
printf("\nOperation is failure.");
exit(0);
}
}
I2C_FSETH(hI2C,I2CSTR,BB,1);
I2C_reset(hI2C);
I2C_close(hI2C);
printf("\nOperation is success.");
}
/********************************************************************************/
//This function waits until the I2C bus busy bit is reset
waitForBusFree(I2C_Handle hI2C)
{
//Waiting for Bit12 of ICSTR ie. BB (Bus Busy) to clear
while(I2C_bb(hI2C));
}
//This function waits untill the I2C bus busy bit gets set
waitForBusBusy(I2C_Handle hI2C)
{
//Waiting for Bit12 of ICSTR ie. BB (Bus Busy) to set
while(!I2C_bb(hI2C));
}
/********************************************************************************/
/********************************************************************************\
\* End of DEC6713_EEPROM.C *\
\********************************************************************************/
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