📄 display_driver.txt
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596. WriteDirect(CMD_MODE,0x2A);
597. WriteDirect(DATA_MODE,0x0002);
598.
599. WriteDirect(CMD_MODE,0x2C);
600. WriteDirect(DATA_MODE,0x0002);
601.
602. WriteDirect(CMD_MODE,0x2D);
603. WriteDirect(DATA_MODE,0x0002);
604.
605. WriteDirect(CMD_MODE,0x3A);
606. WriteDirect(DATA_MODE,0x0001);
607.
608. WriteDirect(CMD_MODE,0x3B);
609. WriteDirect(DATA_MODE,0x0001);
610.
611. WriteDirect(CMD_MODE,0x3C);
612. WriteDirect(DATA_MODE,0x00F0);
613.
614. WriteDirect(CMD_MODE,0x3D);
615. WriteDirect(DATA_MODE,0x0000);
616. delay(20);
617.
618. WriteDirect(CMD_MODE,0x35);
619. WriteDirect(DATA_MODE,0x0038);
620.
621. WriteDirect(CMD_MODE,0x36);
622. WriteDirect(DATA_MODE,0x0078);
623.
624. WriteDirect(CMD_MODE,0x3E);
625. WriteDirect(DATA_MODE,0x0038);
626.
627. WriteDirect(CMD_MODE,0x40);
628. WriteDirect(DATA_MODE,0x000F);
629.
630. WriteDirect(CMD_MODE,0x41);
631. WriteDirect(DATA_MODE,0x00F0);
632.
633. WriteDirect(CMD_MODE,0x19);
634. WriteDirect(DATA_MODE,0x0049);
635.
636. WriteDirect(CMD_MODE,0x93);
637. WriteDirect(DATA_MODE,0x0003);
638. delay(10);
639.
640. WriteDirect(CMD_MODE,0x20);
641. WriteDirect(DATA_MODE,0x0020);
642.
643. WriteDirect(CMD_MODE,0x1D);
644. WriteDirect(DATA_MODE,0x0005);
645. delay(10);
646.
647. WriteDirect(CMD_MODE,0x1E);
648. WriteDirect(DATA_MODE,0x0006);
649.
650. WriteDirect(CMD_MODE,0x1F);
651. WriteDirect(DATA_MODE,0x0008);
652.
653. //VCOM setting
654. WriteDirect(CMD_MODE,0x44);
655. WriteDirect(DATA_MODE,0x0040);
656.
657. WriteDirect(CMD_MODE,0x45);
658. WriteDirect(DATA_MODE,0x0012);
659. delay(10);
660.
661. WriteDirect(CMD_MODE,0x1C);
662. WriteDirect(DATA_MODE,0x0004);
663. delay(20);
664.
665. WriteDirect(CMD_MODE,0x43);
666. WriteDirect(DATA_MODE,0x0080);
667. delay(5);
668.
669. WriteDirect(CMD_MODE,0x1B);
670. WriteDirect(DATA_MODE,0x0008);//0X00,0X08
671. delay(40);
672.
673. WriteDirect(CMD_MODE,0x1B);
674. WriteDirect(DATA_MODE,0x0010);//0X00,0X10
675. delay(40);
676.
677. WriteDirect(CMD_MODE,0x43);
678. WriteDirect(DATA_MODE,0x0080);
679. delay(10);
680. //Display ON setting
681. WriteDirect(CMD_MODE,0x90);
682. WriteDirect(DATA_MODE,0x007F);
683.
684. WriteDirect(CMD_MODE,0x26);
685. WriteDirect(DATA_MODE,0x0004);
686. delay(40);
687.
688. WriteDirect(CMD_MODE,0x26);
689. WriteDirect(DATA_MODE,0x0024);
690. delay(40);
691.
692. WriteDirect(CMD_MODE,0x26);
693. WriteDirect(DATA_MODE,0x002C);
694. delay(40);
695.
696. WriteDirect(CMD_MODE,0x26);
697. WriteDirect(DATA_MODE,0x003C);
698.
699. //Set internal VDDD voltage
700. WriteDirect(CMD_MODE,0x57);
701. WriteDirect(DATA_MODE,0x0002);
702.
703. WriteDirect(CMD_MODE,0x55);
704. WriteDirect(DATA_MODE,0x0000);
705.
706. WriteDirect(CMD_MODE,0x57);
707. WriteDirect(DATA_MODE,0x0000);
708.
709.
710. }
711.
712.
713. /*
714. #ifdef RTOS_THREADX // VSYNC only supported in threadx builds
715. ////////////////////////////////////////////////////////////////////////////////
716. //! \fn static void ddi_display_controllerVsyncIsr(void *)
717. //!
718. //! \brief Services the VSYNC interrupt
719. //!
720. //! \fntype Deferred service routine
721. //!
722. //! This function signals the occurrence of the VSYNC signal. The VSYNC event
723. //! is signalled via semaphore.
724. //!
725. ////////////////////////////////////////////////////////////////////////////////
726. static void ddi_display_controller_VsyncIsr(void *vUnused)
727. {
728. // Check to see if this is our interrupt
729. if( CHECK_VSYNC_IRQ_STATUS() )
730. {
731. // Put the VSYNC semaphore as a binary semaphore
732. // There only ever needs to be at most one instance
733. tx_semaphore_put(pVideoSemaphore);
734.
735. // Disable and clear the interrupt
736. DISABLE_VSYNC_IRQ();
737. CLEAR_VSYNC_IRQ_STATUS();
738.
739. }
740.
741. // If it's not our interrupt, ignore this
742. }
743. */
744. ////////////////////////////////////////////////////////////////////////////////
745. //! \fn static RtStatus_t WaitForControllerVsync(void)
746. //!
747. //! \brief Blocks until the next valid VSYNC edge
748. //!
749. //! \fntype Function
750. //!
751. //! In VSYNC mode, this command will block the calling thread until the next
752. //! valid VSYNC edge or until the timeout period has elapsed.
753. //!
754. ////////////////////////////////////////////////////////////////////////////////
755. /*
756. static RtStatus_t WaitForControllerVsync(void)
757. {
758. RtStatus_t ret = SUCCESS;
759. uint32_t u32Ret;
760.
761. if( ddi_etm_IsPresent() ) {
762. return SUCCESS;
763. }
764.
765. // Check if our semaphore was created
766. if( g_ddi_display_VideoMode == DDI_DISPLAY_VSYNC_MODE && pVideoSemaphore )
767. {
768. // Enable the interrupt vector
769. hw_icoll_EnableVector(GPIO_VSYNC_IRQ_VECTOR, true);
770.
771. // Now enable the VSYNC ISR, it will put the binary semaphore on the
772. // next VSYNC edge
773. ENABLE_VSYNC_IRQ();
774.
775. // Block on the VSYNC signal
776. u32Ret = tx_semaphore_get(pVideoSemaphore, VSYNC_TIMEOUT_TICKS);
777. if( u32Ret )
778. {
779. ret = CONVERT_TX_RTCODE(u32Ret);
780. if( ERROR_OS_KERNEL_TX_NO_INSTANCE == ret )
781. {
782. // There was an error with the VSYNC signal reception
783. ret = ERROR_DDI_DISPLAY_CONTROLLER_VSYNC;
784. }
785. }
786. }
787. else
788. {
789. // Not our ISR, we're not configured for VSYNC mode
790. ret = ERROR_DDI_DISPLAY_CONTROLLER_VSYNC;
791. }
792.
793. return ret;
794. }
795. */
796. ////////////////////////////////////////////////////////////////////////////////
797. //! \fn static RtStatus_t SendControllerVideoMode(ddi_display_VideoMode_t VideoMode)
798. //!
799. //! \brief Sets up the controller for the desired video mode
800. //!
801. //! \fntype Function
802. //!
803. //! \param[in] VideoMode The desired mode of operation for the display driver
804. //!
805. //! This function sets up the necessary hardware for the desired video mode of
806. //! operation. The default is \ref DDI_DISPLAY ASYNC_MODE which will have no
807. //! synchronization with the controller video RAM refresh. When using
808. //! \ref DDI_DISPLAY_VSYNC_MODE, calls to \ref ddi_display_Draw will block the
809. //! calling thread until the next rising edge of the VSYNC signal.
810. //!
811. //! \note Future implementations (Piano) will include a DDI_DISPLAY_DOTCLK_MODE
812. //! which will use the VSYNC/HSYNC/DOTCLK/DEN signals to transfer video.
813. //!
814. ////////////////////////////////////////////////////////////////////////////////
815. /*
816. static RtStatus_t SendControllerVideoMode(ddi_display_VideoMode_t VideoMode)
817. {
818. RtStatus_t ret = SUCCESS;
819. SSD1289LCDDrivingWaveformControl LCDDrivingWaveformControl = { 0x0600 };
820. SSD1289FrameCycleControl FrameCycleControl = {0};
821. SSD1289VerticalPorch VerticalPorch = {0x0003};
822.
823. if( DDI_DISPLAY_VSYNC_MODE == VideoMode && DDI_DISPLAY_VSYNC_MODE != g_ddi_display_VideoMode )
824. {
825. ddi_gpio_Cfg_t GpioConfig;
826. void (*pGpioVsyncHandler)(void*);
827.
828. // Check if someone else has registered a GPIO handler for our vector
829. pGpioVsyncHandler = ddi_icoll_GetHandlerFunction(GPIO_VSYNC_IRQ_VECTOR);
830.
831. // If no handler has been registered it will be the ddi_icoll_DefaultIsr
832. // If this function is called after we have already registered, it will ddi_display_controller_VsyncIsr
833. if( pGpioVsyncHandler != ddi_icoll_DefaultIsr && pGpioVsyncHandler != ddi_display_controller_VsyncIsr )
834. {
835. // Someone else has installed a GPIO handler function
836. // Until the GPIO driver has the proper interrupt chaining
837. // implemented to support multiple interrupts on a single GPIO
838. // bank, we will not be able to use VSYNC mode. This needs to be
839. // corrected, so we're going to halt here until it is
840. SystemHalt();
841. }
842.
843. // Now register our interrupt handler
844. ddi_icoll_RegisterIrqHandler(GPIO_VSYNC_IRQ_VECTOR, ddi_display_controller_VsyncIsr, NULL, IRQ_HANDLER_DIRECT, PRIORITY_VIDEO_ISR);
845.
846. // Create the video semaphore if not already created
847. if( !pVideoSemaphore )
848. {
849. // Create semaphore without priority inheritence.
850. // Only one thread ever will be trying to access this.
851. ret = os_txi_SemaphoreAllocate(&pVideoSemaphore, DMI_MEM_SOURCE_DONTCARE, "video", false);
852.
853. // Return an error if couldn't create semaphore
854. if( ret )
855. return ret;
856. }
857.
858. // Setup GPIO VSYNC signal
859. GpioConfig.mask = GPIO_VSYNC_CONFIG_MASK | GPIO_MASK_IRQ_ENABLED;
860.
861. // Attempt to reserve and configure the pin
862. ret = ddi_gpio_LockAndLoadPin(GPIO_VSYNC_IRQ_PIN, GpioConfig);
863.
864. // Check for failure
865. if( ret )
866. {
867. if( pVideoSemaphore )
868. {
869. // Free the video semaphore due to error
870. os_txi_SemaphoreRelease(pVideoSemaphore);
871. // Set it to NULL again so we can check for the semaphore later
872. pVideoSemaphore = NULL;
873. }
874.
875. return ret;
876. }
877.
878. // Enable the vector
879. hw_icoll_EnableVector(GPIO_VSYNC_IRQ_VECTOR, true);
880.
881. // Now setup the display controller to output the sync signal
882. LCDDrivingWaveformControl.B.ENWS = 1; // Enable sync
883. WriteDirect(CMD_MODE, 0x02); // LCD Driving Waveform Control
884. WriteDirect(DATA_MODE, LCDDrivingWaveformControl.V); // Enable sync output
885.
886. // Adjust these settings to get desired frame rate
887. FrameCycleControl.B.SDIV = 1;
888. FrameCycleControl.B.DIV = 0;
889. WriteDirect(CMD_MODE, 0x0b); // Frame Cycle Control
890. WriteDirect(DATA_MODE, FrameCycleControl.V);
891.
892. WriteDirect(CMD_MODE, 0x17); // Vertical Porch
893. WriteDirect(DATA_MODE, VerticalPorch.V);
894.
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