manqiesite.qsf

cpld实现的并行数据串行传输收发模块（类曼切斯特码）。最大2M并行码率。

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		manqiesite_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:27:29  FEBRUARY 21, 2009"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VHDL_FILE code.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE code.vwf
set_global_assignment -name VHDL_FILE decode.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE decode.vwf
set_global_assignment -name VHDL_FILE deco_t.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE deco_t.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE main.vwf
set_global_assignment -name BDF_FILE time.bdf
set_global_assignment -name VHDL_FILE div4.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE div4.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE time.vwf
set_global_assignment -name BDF_FILE shift.bdf
set_global_assignment -name BDF_FILE main.bdf
set_global_assignment -name VHDL_FILE in_reg.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE reg_in.vwf

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name TOP_LEVEL_ENTITY main

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM570F256C3
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF

# Simulator Assignments
# =====================
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name SIMULATOR_GENERATE_SIGNAL_ACTIVITY_FILE OFF
set_global_assignment -name VECTOR_INPUT_SOURCE main.vwf