manqiesite.hier_info

cpld实现的并行数据串行传输收发模块（类曼切斯特码）。最大2M并行码率。

|main
q <= deco_t:inst1.q
clr_co => deco_t:inst1.clr
clr_co => in_reg:inst2.clr
clr_co => code:inst.clr
decode_en => deco_t:inst1.en
x8_clk => deco_t:inst1.clk4x
clk_co => in_reg:inst2.clk
clk_co => code:inst.clk
en_co => in_reg:inst2.en
wr_co => in_reg:inst2.wr
data_co[0] => in_reg:inst2.data_in[0]
data_co[1] => in_reg:inst2.data_in[1]
data_co[2] => in_reg:inst2.data_in[2]
data_co[3] => in_reg:inst2.data_in[3]
data_co[4] => in_reg:inst2.data_in[4]
data_co[5] => in_reg:inst2.data_in[5]
data_co[6] => in_reg:inst2.data_in[6]
data_co[7] => in_reg:inst2.data_in[7]
data_co[8] => in_reg:inst2.data_in[8]
data_co[9] => in_reg:inst2.data_in[9]
data_co[10] => in_reg:inst2.data_in[10]
data_co[11] => in_reg:inst2.data_in[11]
data_co[12] => in_reg:inst2.data_in[12]
data_co[13] => in_reg:inst2.data_in[13]
data_co[14] => in_reg:inst2.data_in[14]
data_co[15] => in_reg:inst2.data_in[15]
fail <= deco_t:inst1.fail
ready <= deco_t:inst1.ready
jo <= deco_t:inst1.jo_o
code_q <= code:inst.q
in_busy <= in_reg:inst2.i_busy
shift_q <= in_reg:inst2.d_code


|main|deco_t:inst1
clr => process1~0.IN0
clr => count_m17[3].ACLR
clr => count_m17[2].ACLR
clr => count_m17[1].ACLR
clr => count_m17[0].ACLR
clr => chk_r[3].ACLR
clr => chk_r[2].ACLR
clr => chk_r[1].ACLR
clr => chk_r[0].ACLR
clr => count_m17[4].ACLR
en => chk_r[3].ENA
en => chk_r[2].ENA
en => chk_r[1].ENA
en => chk_r[0].ENA
clk4x => count_t[2].CLK
clk4x => count_t[1].CLK
clk4x => count_t[0].CLK
clk4x => den.CLK
clk4x => clk_key.CLK
d => clk_key~1.OUTPUTSELECT
d => deco~0.IN1
d => chk_r[0].DATAIN
q <= q~reg0.DB_MAX_OUTPUT_PORT_TYPE
fail <= fail~1.DB_MAX_OUTPUT_PORT_TYPE
ready <= ready~reg0.DB_MAX_OUTPUT_PORT_TYPE
deco_o <= deco~1.DB_MAX_OUTPUT_PORT_TYPE
jo_o <= jo.DB_MAX_OUTPUT_PORT_TYPE
den_o <= den.DB_MAX_OUTPUT_PORT_TYPE
count_k <= clk_key.DB_MAX_OUTPUT_PORT_TYPE
clk1_o <= clk1~0.DB_MAX_OUTPUT_PORT_TYPE
clk2_o <= clk2~0.DB_MAX_OUTPUT_PORT_TYPE
count17o[0] <= count_m17[0].DB_MAX_OUTPUT_PORT_TYPE
count17o[1] <= count_m17[1].DB_MAX_OUTPUT_PORT_TYPE
count17o[2] <= count_m17[2].DB_MAX_OUTPUT_PORT_TYPE
count17o[3] <= count_m17[3].DB_MAX_OUTPUT_PORT_TYPE
count17o[4] <= count_m17[4].DB_MAX_OUTPUT_PORT_TYPE


|main|code:inst
en => clk2~0.OUTPUTSELECT
en => count_m40~0.OUTPUTSELECT
en => count_m40~1.OUTPUTSELECT
en => count_m40~2.OUTPUTSELECT
en => count_m40~3.OUTPUTSELECT
en => count_m40~4.OUTPUTSELECT
en => count_m40~5.OUTPUTSELECT
en => shift_r[2].ENA
en => shift_r[1].ENA
en => shift_r[0].ENA
en => jo.ENA
d => shift_r[0].DATAIN
clk => count_m40[5].CLK
clk => count_m40[4].CLK
clk => count_m40[3].CLK
clk => count_m40[2].CLK
clk => count_m40[1].CLK
clk => count_m40[0].CLK
clk => q~reg0.CLK
clk => clk2.CLK
clk => clk1x.DATAIN
clr => clk2~1.OUTPUTSELECT
clr => count_m40[4].ACLR
clr => count_m40[3].ACLR
clr => count_m40[2].ACLR
clr => count_m40[1].ACLR
clr => count_m40[0].ACLR
clr => shift_r[2].ACLR
clr => shift_r[1].ACLR
clr => shift_r[0].ACLR
clr => jo.ACLR
clr => mo~6.OUTPUTSELECT
clr => count_m40[5].ACLR
q <= q~reg0.DB_MAX_OUTPUT_PORT_TYPE
clk1x <= clk.DB_MAX_OUTPUT_PORT_TYPE
clk2x <= clk2.DB_MAX_OUTPUT_PORT_TYPE
mo_o <= mo~6.DB_MAX_OUTPUT_PORT_TYPE
shift_o[0] <= shift_r[0].DB_MAX_OUTPUT_PORT_TYPE
shift_o[1] <= shift_r[1].DB_MAX_OUTPUT_PORT_TYPE
shift_o[2] <= shift_r[2].DB_MAX_OUTPUT_PORT_TYPE


|main|in_reg:inst2
clk => count_m40[4].CLK
clk => count_m40[3].CLK
clk => count_m40[2].CLK
clk => count_m40[1].CLK
clk => count_m40[0].CLK
clk => active.CLK
clk => shift_reg_tmp[16].CLK
clk => shift_reg_tmp[15].CLK
clk => shift_reg_tmp[14].CLK
clk => shift_reg_tmp[13].CLK
clk => shift_reg_tmp[12].CLK
clk => shift_reg_tmp[11].CLK
clk => shift_reg_tmp[10].CLK
clk => shift_reg_tmp[9].CLK
clk => shift_reg_tmp[8].CLK
clk => shift_reg_tmp[7].CLK
clk => shift_reg_tmp[6].CLK
clk => shift_reg_tmp[5].CLK
clk => shift_reg_tmp[4].CLK
clk => shift_reg_tmp[3].CLK
clk => shift_reg_tmp[2].CLK
clk => shift_reg_tmp[1].CLK
clk => en_code~reg0.CLK
clk => count_m40[5].CLK
en => process1~0.IN0
clr => count_m40[4].ACLR
clr => count_m40[3].ACLR
clr => count_m40[2].ACLR
clr => count_m40[1].ACLR
clr => count_m40[0].ACLR
clr => active.ACLR
clr => shift_reg[16].ACLR
clr => shift_reg[15].ACLR
clr => shift_reg[14].ACLR
clr => shift_reg[13].ACLR
clr => shift_reg[12].ACLR
clr => shift_reg[11].ACLR
clr => shift_reg[10].ACLR
clr => shift_reg[9].ACLR
clr => shift_reg[8].ACLR
clr => shift_reg[7].ACLR
clr => shift_reg[6].ACLR
clr => shift_reg[5].ACLR
clr => shift_reg[4].ACLR
clr => shift_reg[3].ACLR
clr => shift_reg[2].ACLR
clr => shift_reg[1].ACLR
clr => shift_reg[0].ACLR
clr => en_code~reg0.ACLR
clr => count_m40[5].ACLR
data_in[0] => shift_reg~33.DATAB
data_in[1] => shift_reg~32.DATAB
data_in[2] => shift_reg~31.DATAB
data_in[3] => shift_reg~30.DATAB
data_in[4] => shift_reg~29.DATAB
data_in[5] => shift_reg~28.DATAB
data_in[6] => shift_reg~27.DATAB
data_in[7] => shift_reg~26.DATAB
data_in[8] => shift_reg~25.DATAB
data_in[9] => shift_reg~24.DATAB
data_in[10] => shift_reg~23.DATAB
data_in[11] => shift_reg~22.DATAB
data_in[12] => shift_reg~21.DATAB
data_in[13] => shift_reg~20.DATAB
data_in[14] => shift_reg~19.DATAB
data_in[15] => shift_reg~18.DATAB
wr => process1~0.IN1
i_busy <= active.DB_MAX_OUTPUT_PORT_TYPE
en_code <= en_code~reg0.DB_MAX_OUTPUT_PORT_TYPE
d_code <= d_code~reg0.DB_MAX_OUTPUT_PORT_TYPE