📄 display.lst
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C51 COMPILER V6.12 DISPLAY 06/01/2005 16:41:48 PAGE 1
C51 COMPILER V6.12, COMPILATION OF MODULE DISPLAY
OBJECT MODULE PLACED IN .\display.OBJ
COMPILER INVOKED BY: d:\Keil\C51\BIN\C51.EXE .\display.c BROWSE DEBUG OBJECTEXTEND CODE LISTINCLUDE SYMBOLS
stmt level source
1 #include "public.h"
1 =1 #include "common.h"
1 =2 #include <AT89X52.H>
1 =3 /*--------------------------------------------------------------------------
2 =3 AT89X52.H
3 =3
4 =3 Header file for the low voltage Flash Atmel AT89C52 and AT89LV52.
5 =3 Copyright (c) 1995-1996 Keil Software, Inc. All rights reserved.
6 =3 --------------------------------------------------------------------------*/
7 =3
8 =3 #ifndef AT89X52_HEADER_FILE
9 =3 #define AT89X52_HEADER_FILE 1
10 =3
11 =3 /*------------------------------------------------
12 =3 Byte Registers
13 =3 ------------------------------------------------*/
14 =3 sfr P0 = 0x80;
15 =3 sfr SP = 0x81;
16 =3 sfr DPL = 0x82;
17 =3 sfr DPH = 0x83;
18 =3 sfr PCON = 0x87;
19 =3 sfr TCON = 0x88;
20 =3 sfr TMOD = 0x89;
21 =3 sfr TL0 = 0x8A;
22 =3 sfr TL1 = 0x8B;
23 =3 sfr TH0 = 0x8C;
24 =3 sfr TH1 = 0x8D;
25 =3 sfr P1 = 0x90;
26 =3 sfr SCON = 0x98;
27 =3 sfr SBUF = 0x99;
28 =3 sfr P2 = 0xA0;
29 =3 sfr IE = 0xA8;
30 =3 sfr P3 = 0xB0;
31 =3 sfr IP = 0xB8;
32 =3 sfr T2CON = 0xC8;
33 =3 sfr T2MOD = 0xC9;
34 =3 sfr RCAP2L = 0xCA;
35 =3 sfr RCAP2H = 0xCB;
36 =3 sfr TL2 = 0xCC;
37 =3 sfr TH2 = 0xCD;
38 =3 sfr PSW = 0xD0;
39 =3 sfr ACC = 0xE0;
40 =3 sfr B = 0xF0;
41 =3
42 =3 /*------------------------------------------------
43 =3 P0 Bit Registers
44 =3 ------------------------------------------------*/
45 =3 sbit P0_0 = 0x80;
46 =3 sbit P0_1 = 0x81;
47 =3 sbit P0_2 = 0x82;
48 =3 sbit P0_3 = 0x83;
49 =3 sbit P0_4 = 0x84;
50 =3 sbit P0_5 = 0x85;
51 =3 sbit P0_6 = 0x86;
52 =3 sbit P0_7 = 0x87;
C51 COMPILER V6.12 DISPLAY 06/01/2005 16:41:48 PAGE 2
53 =3
54 =3 /*------------------------------------------------
55 =3 PCON Bit Values
56 =3 ------------------------------------------------*/
57 =3 #define IDL_ 0x01
58 =3
59 =3 #define STOP_ 0x02
60 =3 #define PD_ 0x02 /* Alternate definition */
61 =3
62 =3 #define GF0_ 0x04
63 =3 #define GF1_ 0x08
64 =3 #define SMOD_ 0x80
65 =3
66 =3 /*------------------------------------------------
67 =3 TCON Bit Registers
68 =3 ------------------------------------------------*/
69 =3 sbit IT0 = 0x88;
70 =3 sbit IE0 = 0x89;
71 =3 sbit IT1 = 0x8A;
72 =3 sbit IE1 = 0x8B;
73 =3 sbit TR0 = 0x8C;
74 =3 sbit TF0 = 0x8D;
75 =3 sbit TR1 = 0x8E;
76 =3 sbit TF1 = 0x8F;
77 =3
78 =3 /*------------------------------------------------
79 =3 TMOD Bit Values
80 =3 ------------------------------------------------*/
81 =3 #define T0_M0_ 0x01
82 =3 #define T0_M1_ 0x02
83 =3 #define T0_CT_ 0x04
84 =3 #define T0_GATE_ 0x08
85 =3 #define T1_M0_ 0x10
86 =3 #define T1_M1_ 0x20
87 =3 #define T1_CT_ 0x40
88 =3 #define T1_GATE_ 0x80
89 =3
90 =3 #define T1_MASK_ 0xF0
91 =3 #define T0_MASK_ 0x0F
92 =3
93 =3 /*------------------------------------------------
94 =3 P1 Bit Registers
95 =3 ------------------------------------------------*/
96 =3 sbit P1_0 = 0x90;
97 =3 sbit P1_1 = 0x91;
98 =3 sbit P1_2 = 0x92;
99 =3 sbit P1_3 = 0x93;
100 =3 sbit P1_4 = 0x94;
101 =3 sbit P1_5 = 0x95;
102 =3 sbit P1_6 = 0x96;
103 =3 sbit P1_7 = 0x97;
104 =3
105 =3 sbit T2 = 0x90; /* External input to Timer/Counter 2, clock out */
106 =3 sbit T2EX = 0x91; /* Timer/Counter 2 capture/reload trigger & dir ctl */
107 =3
108 =3 /*------------------------------------------------
109 =3 SCON Bit Registers
110 =3 ------------------------------------------------*/
111 =3 sbit RI = 0x98;
112 =3 sbit TI = 0x99;
113 =3 sbit RB8 = 0x9A;
114 =3 sbit TB8 = 0x9B;
C51 COMPILER V6.12 DISPLAY 06/01/2005 16:41:48 PAGE 3
115 =3 sbit REN = 0x9C;
116 =3 sbit SM2 = 0x9D;
117 =3 sbit SM1 = 0x9E;
118 =3 sbit SM0 = 0x9F;
119 =3
120 =3 /*------------------------------------------------
121 =3 P2 Bit Registers
122 =3 ------------------------------------------------*/
123 =3 sbit P2_0 = 0xA0;
124 =3 sbit P2_1 = 0xA1;
125 =3 sbit P2_2 = 0xA2;
126 =3 sbit P2_3 = 0xA3;
127 =3 sbit P2_4 = 0xA4;
128 =3 sbit P2_5 = 0xA5;
129 =3 sbit P2_6 = 0xA6;
130 =3 sbit P2_7 = 0xA7;
131 =3
132 =3 /*------------------------------------------------
133 =3 IE Bit Registers
134 =3 ------------------------------------------------*/
135 =3 sbit EX0 = 0xA8; /* 1=Enable External interrupt 0 */
136 =3 sbit ET0 = 0xA9; /* 1=Enable Timer 0 interrupt */
137 =3 sbit EX1 = 0xAA; /* 1=Enable External interrupt 1 */
138 =3 sbit ET1 = 0xAB; /* 1=Enable Timer 1 interrupt */
139 =3 sbit ES = 0xAC; /* 1=Enable Serial port interrupt */
140 =3 sbit ET2 = 0xAD; /* 1=Enable Timer 2 interrupt */
141 =3
142 =3 sbit EA = 0xAF; /* 0=Disable all interrupts */
143 =3
144 =3 /*------------------------------------------------
145 =3 P3 Bit Registers (Mnemonics & Ports)
146 =3 ------------------------------------------------*/
147 =3 sbit P3_0 = 0xB0;
148 =3 sbit P3_1 = 0xB1;
149 =3 sbit P3_2 = 0xB2;
150 =3 sbit P3_3 = 0xB3;
151 =3 sbit P3_4 = 0xB4;
152 =3 sbit P3_5 = 0xB5;
153 =3 sbit P3_6 = 0xB6;
154 =3 sbit P3_7 = 0xB7;
155 =3
156 =3 sbit RXD = 0xB0; /* Serial data input */
157 =3 sbit TXD = 0xB1; /* Serial data output */
158 =3 sbit INT0 = 0xB2; /* External interrupt 0 */
159 =3 sbit INT1 = 0xB3; /* External interrupt 1 */
160 =3 sbit T0 = 0xB4; /* Timer 0 external input */
161 =3 sbit T1 = 0xB5; /* Timer 1 external input */
162 =3 sbit WR = 0xB6; /* External data memory write strobe */
163 =3 sbit RD = 0xB7; /* External data memory read strobe */
164 =3
165 =3 /*------------------------------------------------
166 =3 IP Bit Registers
167 =3 ------------------------------------------------*/
168 =3 sbit PX0 = 0xB8;
169 =3 sbit PT0 = 0xB9;
170 =3 sbit PX1 = 0xBA;
171 =3 sbit PT1 = 0xBB;
172 =3 sbit PS = 0xBC;
173 =3 sbit PT2 = 0xBD;
174 =3
175 =3 /*------------------------------------------------
176 =3 T2CON Bit Registers
C51 COMPILER V6.12 DISPLAY 06/01/2005 16:41:48 PAGE 4
177 =3 ------------------------------------------------*/
178 =3 sbit CP_RL2= 0xC8; /* 0=Reload, 1=Capture select */
179 =3 sbit C_T2 = 0xC9; /* 0=Timer, 1=Counter */
180 =3 sbit TR2 = 0xCA; /* 0=Stop timer, 1=Start timer */
181 =3 sbit EXEN2= 0xCB; /* Timer 2 external enable */
182 =3 sbit TCLK = 0xCC; /* 0=Serial clock uses Timer 1 overflow, 1=Timer 2 */
183 =3 sbit RCLK = 0xCD; /* 0=Serial clock uses Timer 1 overflow, 1=Timer 2 */
184 =3 sbit EXF2 = 0xCE; /* Timer 2 external flag */
185 =3 sbit TF2 = 0xCF; /* Timer 2 overflow flag */
186 =3
187 =3 /*------------------------------------------------
188 =3 T2MOD Bit Values
189 =3 ------------------------------------------------*/
190 =3 #define DCEN_ 0x01 /* 1=Timer 2 can be configured as up/down counter */
191 =3 #define T2OE_ 0x02 /* Timer 2 output enable */
192 =3
193 =3 /*------------------------------------------------
194 =3 PSW Bit Registers
195 =3 ------------------------------------------------*/
196 =3 sbit P = 0xD0;
197 =3 sbit FL = 0xD1;
198 =3 sbit OV = 0xD2;
199 =3 sbit RS0 = 0xD3;
200 =3 sbit RS1 = 0xD4;
201 =3 sbit F0 = 0xD5;
202 =3 sbit AC = 0xD6;
203 =3 sbit CY = 0xD7;
204 =3
205 =3 /*------------------------------------------------
206 =3 Interrupt Vectors:
207 =3 Interrupt Address = (Number * 8) + 3
208 =3 ------------------------------------------------*/
209 =3 #define IE0_VECTOR 0 /* 0x03 External Interrupt 0 */
210 =3 #define TF0_VECTOR 1 /* 0x0B Timer 0 */
211 =3 #define IE1_VECTOR 2 /* 0x13 External Interrupt 1 */
212 =3 #define TF1_VECTOR 3 /* 0x1B Timer 1 */
213 =3 #define SIO_VECTOR 4 /* 0x23 Serial port */
214 =3
215 =3 #define TF2_VECTOR 5 /* 0x2B Timer 2 */
216 =3 #define EX2_VECTOR 5 /* 0x2B External Interrupt 2 */
217 =3
218 =3 /*------------------------------------------------
219 =3 ------------------------------------------------*/
220 =3 #endif
221 =3
222 =3
2 =2 #include <absacc.h>
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