net_bsp.c

ucos

/*
*********************************************************************************************************
*                                              uC/TCP-IP
*                                      The Embedded TCP/IP Stack
*
*                            (c) Copyright 2004; Micrium, Inc.; Weston, FL
*
*                   All rights reserved.  Protected by international copyright laws.
*                   Knowledge of the source code may not be used to write a similar
*                   product.  This file may only be used in accordance with a license
*                   and should not be redistributed in any way.
*********************************************************************************************************
*
*                                BOARD SUPPORT PACKAGE (BSP) FUNCTIONS
*
*                                          AT91SAM7X256
*
* Filename   : net_bsp.c
* Programmer : Eric Shufro
* Version    : 2.0
* Date       : 04/11/2006
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                            INCLUDE FILES
*********************************************************************************************************
*/

#include <includes.h>

/*
*********************************************************************************************************
*                                            LOCAL DEFINES
*********************************************************************************************************
*/

/*
*********************************************************************************************************
*                                            PROTOTYPES
*********************************************************************************************************
*/

extern void  NetNIC_ISR_Handler(void);


/*
*********************************************************************************************************
*                                        Reset and Initialize the PHY hardware
*
* Description : This function is called by NetNIC_PhyInit() to hardware reset the PHY
*             : and configure the IO pins necessary to communicate between the MAC and PHY
*
* Arguments   : none
*********************************************************************************************************
*/

void NetBSP_Phy_HW_Init (void)
{
    CPU_INT32U pins;                                                 /* Hold the value of the PHY peripheral pins               */


    AT91C_BASE_PMC->PMC_PCER                 = (1 << AT91C_ID_PIOB); /* Ensure the clock for PIOB is enabled                    */

    AT91C_BASE_PIOB->PIO_PPUDR               = 1 << 15;              /* Disable RXDV pullup, enter PHY normal mode              */
                                                                     /* Note: the PHY has an internal pull-down                 */
#ifndef RMII
    AT91C_BASE_PIOB->PIO_PPUDR               = 1 << 16;              /* PHY has internal pull down, set MII mode                */
#endif

    AT91C_BASE_PIOB->PIO_PER                 = 1 << 18;              /* Enable pin 18 as GPIO controlled                        */
    AT91C_BASE_PIOB->PIO_OER                 = 1 << 18;              /* Set pin 18 (PWRDWN) as an output pin                    */
    AT91C_BASE_PIOB->PIO_CODR                = 1 << 18;              /* Clear the PWRDWN pin, which powers UP the PHY           */

                                                                     /* Perform the HW reset of the PHY                         */

                                                                     /* Set the amount of time reset should be asserted         */
    AT91C_BASE_RSTC->RSTC_RMR |= 0xA5000000 | AT91C_RSTC_ERSTL & (1 << 8);

    AT91C_BASE_RSTC->RSTC_RCR  = 0xA5000000 | AT91C_RSTC_EXTRST;     /* Toggle the NRST PHY reset pin                           */

                                                                     /* Wait for the hardware reset to complete                 */
    while ((AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL) == 0) {    /* This always completes                                   */
        ;
    }
                                                                     /* Set a variable containing a value for the used PHY pins */
    pins                      = ((CPU_INT32U) AT91C_PB2_ETX0)         |
                                ((CPU_INT32U) AT91C_PB12_ETXER)       |
                                ((CPU_INT32U) AT91C_PB16_ECOL)        |
                                ((CPU_INT32U) AT91C_PB11_ETX3)        |
                                ((CPU_INT32U) AT91C_PB6_ERX1)         |
                                ((CPU_INT32U) AT91C_PB15_ERXDV_ECRSDV)|
                                ((CPU_INT32U) AT91C_PB13_ERX2)        |
                                ((CPU_INT32U) AT91C_PB3_ETX1)         |
                                ((CPU_INT32U) AT91C_PB8_EMDC)         |
                                ((CPU_INT32U) AT91C_PB5_ERX0)         |
                                ((CPU_INT32U) AT91C_PB14_ERX3)        |
                                ((CPU_INT32U) AT91C_PB4_ECRS)         |
                                ((CPU_INT32U) AT91C_PB1_ETXEN)        |
                                ((CPU_INT32U) AT91C_PB10_ETX2)        |
                                ((CPU_INT32U) AT91C_PB0_ETXCK_EREFCK) |
                                ((CPU_INT32U) AT91C_PB9_EMDIO)        |
                                ((CPU_INT32U) AT91C_PB7_ERXER)        |
                                ((CPU_INT32U) AT91C_PB17_ERXCK);


    AT91C_BASE_PIOB->PIO_ASR  =   pins;                              /* Select peripheral A use of the associated pins          */
    AT91C_BASE_PIOB->PIO_BSR  =      0;                              /* Select peripheral B, no peripheral B pins used          */
    AT91C_BASE_PIOB->PIO_PDR  =   pins;                              /* Set peripheral control of the associated pins           */
}


/*
*********************************************************************************************************
*                                        EMAC Link Settings Update
*
* Description : This function is called by NetNIC_Init and the PHY ISR in order to update the
*             : speed and duplex settings for the EMAC.
*
* Arguments   : none
*********************************************************************************************************
*/

void NetBSP_EMAC_Settings_Update (CPU_INT32U link_speed, CPU_INT32U link_duplex)
{
    INT32U reg_val;

                                                                        /* Get EMAC config, clear speed & duplex bits     */
    reg_val                                  =   AT91C_BASE_EMAC->EMAC_NCFGR & ~(AT91C_EMAC_SPD | AT91C_EMAC_FD);

    if (link_speed ==  EMAC_SPD_100) {                                  /* If 100mbps, set the 100mbps bit in reg_val     */
        reg_val                             |=   AT91C_EMAC_SPD;
    }

    if (link_duplex == EMAC_DUPLEX_FULL) {
        reg_val                             |=   AT91C_EMAC_FD;         /* If Full Duplex, set the FD bit in reg_val      */
    }
                                                                        /* Write the Link speed and duplex values to the  */
    AT91C_BASE_EMAC->EMAC_NCFGR = reg_val;                              /* EMAC control network configuration register    */
}


/*
*********************************************************************************************************
*                                        DM9161AE_DlyAutoNegAck()
*
* Description : This function is called by NetNIC_PhyAutoNeg() and simply causes a delay that is long
*               enough such that the Davicom PHY auto-negotiation may complete.
*
* Arguments   : none
*********************************************************************************************************
*/

void  DM9161AE_DlyAutoNegAck (void)
{
    OSTimeDlyHMSM(0, 0, 1, 0);                                          /* Delay 1s, this is more than enough time        */
}


/*
*********************************************************************************************************
*                                        NIC_RdWrDly()
*
* Description : This function is called by NetNIC_PhyRegRd() and NetNIC_PhyRegWr() every time a PHY
*               register needs to be read from or written to. This function creates a delay of 1ms such
*               that there is enough time for the register read or write to complete. The calling function
*               uses this as way of determining whether a read or write failed due to a timeout.
*
* Arguments   : none
*********************************************************************************************************
*/

void  NetBSP_NIC_PhyRdWrDly (void)
{
    OSTimeDlyHMSM(0, 0, 0, 1);                                          /* Delay 1 ms                                     */
}


/*
*********************************************************************************************************
*                                            NetNIC_LinkUp()
*
* Description : Message from NIC that the ethernet link is up.
*
* Argument(s) : none.
*
* Return(s)   : none.
*
* Caller(s)   : none.
*
* Note(s)     : WARNING: Called in interruption context most of the time.
*********************************************************************************************************
*/

void  NetNIC_LinkUp (void)
{
    NetNIC_ConnStatus = DEF_TRUE;
}


/*
*********************************************************************************************************
*                                           NetNIC_LinkDown()
*
* Description : Message from NIC that the ethernet link is down.
*
* Argument(s) : none.
*
* Return(s)   : none.
*
* Caller(s)   : none.
*