📄 intrp.lst
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ARM COMPILER V2.00f, Intrp 11/02/05 12:47:27 PAGE 1
ARM COMPILER V2.00f, COMPILATION OF MODULE Intrp
OBJECT MODULE PLACED IN Intrp.OBJ
COMPILER INVOKED BY: C:\Keil\ARM\BIN\CA.exe Intrp.c THUMB OPTIMIZE(7,SPEED) BROWSE DEBUG TABS(4)
stmt level source
1 /******************************************************************************/
2 /* This file is create using Keil uVision/ARM and the Keil CA ARM Compiler */
3 /* Copyright KEIL ELEKTRONIK GmbH 2004 */
4 /******************************************************************************/
5 /* */
6 /* EXTINT.C: Demonstration of External Interrupt */
7 /* */
8 /******************************************************************************/
9
10 #include <LPC21xx.H> /* LPC21xx definitions */
11
12 int volatile intrp_count = 0;
13 int volatile timeval = 0;
14 int volatile SecondCnt = 0;
15
16 // Macros for Interrupt Nesting
17 #define IENABLE /* Nested Interrupts Entry */ \
18 __asm { MRS LR, SPSR } /* Copy SPSR_irq to LR */ \
19 __asm { STMFD SP!, {LR} } /* Save SPSR_irq */ \
20 __asm { MSR CPSR_c, #0x1F } /* Enable IRQ (Sys Mode) */ \
21 __asm { STMFD SP!, {LR} } /* Save LR */ \
22
23 #define IDISABLE /* Nested Interrupts Exit */ \
24 __asm { LDMFD SP!, {LR} } /* Restore LR */ \
25 __asm { MSR CPSR_c, #0x92 } /* Disable IRQ (IRQ Mode) */ \
26 __asm { LDMFD SP!, {LR} } /* Restore SPSR_irq to LR */ \
27 __asm { MSR SPSR_cxsf, LR } /* Copy LR to SPSR_irq */ \
28
29 /* Timer Counter 0 Interrupt executes each 10ms @ 60 MHz CPU Clock */
30 void tc0 (void) __irq {
31 1 ++timeval;
32 1 if ((timeval % 10000) == 0) {
33 2 timeval = 0;
34 2 SecondCnt++;
35 2 }
36 1 T0IR = 1; // Clear interrupt flag
37 1 VICVectAddr = 0; // Acknowledge Interrupt
38 1 }
39
40 /* Setup the Timer Counter 0 Interrupt */
41 void init_timer (void) {
42 1 T0MR0 = 1499; // 0.1mSec = 1.500-1 counts
43 1 T0MCR = 3; // Interrupt and Reset on MR0
44 1 T0TCR = 1; // Timer0 Enable
45 1 VICVectAddr0 = (unsigned long)tc0; // set interrupt vector in 0
46 1 VICVectCntl0 = 0x20 | 4; // use it for Timer 0 Interrupt
47 1 VICIntEnable = 0x00000010; // Enable Timer0 Interrupt
48 1 }
49
50 /* Create a long time delay */
51 void delay (void) {
52 1 int i;
53 1 for (i = 0; i < 0x50000; i++) {
54 2 ;
55 2 }
56 1 }
57
58 /* External Interrupt 1 Service */
59 void eint1_srv (void) __irq {
ARM COMPILER V2.00f, Intrp 11/02/05 12:47:27 PAGE 2
60 1 int i;
61 1 EXTINT = 2; // Clear EINT1 interrupt flag
62 1 IENABLE; // allow nested interrupts
63 1 delay (); // wait a long time
64 1 ++intrp_count; // increment interrupt count
65 1 IDISABLE; // disable interrupt nesting
66 1 VICVectAddr = 0; // Acknowledge Interrupt
67 1 }
68
69 /* Initialize EINT1 Interrupt Pin */
70 void init_eint1 (void) {
71 1 EXTMODE = 2; // Edge sensitive mode on EINT1
72 1 EXTPOLAR = 2; // raising edge sensitive
73 1 PINSEL0 = 2 << 28; // Enable EINT1 on GPIO_0.14
74 1 VICVectAddr1 = (unsigned long) eint1_srv; // set interrupt vector in VIC 0
75 1 VICVectCntl1 = 0x21 | 15; // use VIC 1 for EINT1 Interrupt
76 1 VICIntEnable = 1 << 15; // Enable EINT1 Interrupt
77 1 }
78
79 int main (void) {
80 1 unsigned int LED_out = 0;
81 1
82 1 IODIR1 = 0xFF0000;
83 1
84 1 init_eint1(); // Enable EINT1
85 1 init_timer ();
86 1
87 1 while (1) {
88 2 if ((intrp_count & 0xFF) != LED_out) { // intrp_count has changed
89 3 LED_out = (intrp_count & 0x7F); // set LED out
90 3 IOCLR1 = 0x7F0000; // clear LED's
91 3 IOSET1 = (LED_out << 16); // output intrp_count on LED
92 3 }
93 2 if ((SecondCnt & 1) == 0) IOCLR1 = 0x800000;
94 2 else IOSET1 = 0x800000;
95 2 }
96 1 }
97
98
99
100
ARM COMPILER V2.00f, Intrp 11/02/05 12:47:27 PAGE 3
ASSEMBLY LISTING OF GENERATED OBJECT CODE
*** EXTERNALS:
EXTERN CODE32 (?C?SDIV?A)
EXTERN NUMBER (__startup)
*** PUBLICS:
PUBLIC tc0?A
PUBLIC init_timer?T
PUBLIC delay?T
PUBLIC delay?A
PUBLIC eint1_srv?A
PUBLIC init_eint1?T
PUBLIC main
PUBLIC intrp_count
PUBLIC timeval
PUBLIC SecondCnt
*** DATA SEGMENT '?DT0?Intrp':
00000000 intrp_count:
00000000 BEGIN_INIT
00000000 00000000 DD 0x0
00000004 END_INIT
00000004 timeval:
00000004 BEGIN_INIT
00000004 00000000 DD 0x0
00000008 END_INIT
00000008 SecondCnt:
00000008 BEGIN_INIT
00000008 00000000 DD 0x0
0000000C END_INIT
*** CODE SEGMENT '?PR?tc0?A?Intrp':
30: void tc0 (void) __irq {
00000000 E92D4703 STMDB R13!,{R0-R1,R8-R10,LR}
31: ++timeval;
00000004 E5100000 LDR R0,=timeval ; timeval
00000008 E5901000 LDR R1,[R0,#0x0] ; timeval
0000000C E2811001 ADD R1,R1,#0x0001
00000010 E5801000 STR R1,[R0,#0x0] ; timeval
32: if ((timeval % 10000) == 0) {
00000014 E5100000 LDR R0,=timeval ; timeval
00000018 E5900000 LDR R0,[R0,#0x0] ; timeval
0000001C E5101000 LDR R1,=0x2710
00000020 EBFFFFF6 BL ?C?SDIV?A ; Targ=0x0 ; ?C?SDIV?A
00000024 E1A01000 MOV R1,R0
00000028 E3510000 CMP R1,#0x0000
0000002C 1A000006 BNE L_1 ; Targ=0x4C
33: timeval = 0;
00000030 E3A01000 MOV R1,#0x0
00000034 E5100000 LDR R0,=timeval ; timeval
00000038 E5801000 STR R1,[R0,#0x0] ; timeval
34: SecondCnt++;
0000003C E5100000 LDR R0,=SecondCnt ; SecondCnt
00000040 E5901000 LDR R1,[R0,#0x0] ; SecondCnt
00000044 E2811001 ADD R1,R1,#0x0001
00000048 E5801000 STR R1,[R0,#0x0] ; SecondCnt
35: }
0000004C L_1:
36: T0IR = 1; // Clear interrupt flag
0000004C E3A01001 MOV R1,#0x1
00000050 E5100000 LDR R0,=0xE0004000
00000054 E5801000 STR R1,[R0,#0x0]
37: VICVectAddr = 0; // Acknowledge Interrupt
00000058 E3A01000 MOV R1,#0x0
ARM COMPILER V2.00f, Intrp 11/02/05 12:47:27 PAGE 4
0000005C E5100000 LDR R0,=0xFFFFF030
00000060 E5801000 STR R1,[R0,#0x0]
38: }
00000064 E8BD4703 LDMIA R13!,{R0-R1,R8-R10,LR}
00000068 E25EF004 SUBS R15,R14,#0x0004
0000006C ENDP ; 'tc0?A'
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