📄 cmm_asic.c
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IN PRTMP_ADAPTER pAd, IN BOOLEAN bFromTx){ DBGPRINT(RT_DEBUG_INFO, ("--> AsicForceWakeup \n")); RTMP_STA_FORCE_WAKEUP(pAd, bFromTx);}#endif // CONFIG_STA_SUPPORT ///* ========================================================================== Description: Set My BSSID IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicSetBssid( IN PRTMP_ADAPTER pAd, IN PUCHAR pBssid) { ULONG Addr4; DBGPRINT(RT_DEBUG_TRACE, ("==============> AsicSetBssid %x:%x:%x:%x:%x:%x\n", pBssid[0],pBssid[1],pBssid[2],pBssid[3], pBssid[4],pBssid[5])); Addr4 = (ULONG)(pBssid[0]) | (ULONG)(pBssid[1] << 8) | (ULONG)(pBssid[2] << 16) | (ULONG)(pBssid[3] << 24); RTMP_IO_WRITE32(pAd, MAC_BSSID_DW0, Addr4); Addr4 = 0; // always one BSSID in STA mode Addr4 = (ULONG)(pBssid[4]) | (ULONG)(pBssid[5] << 8); RTMP_IO_WRITE32(pAd, MAC_BSSID_DW1, Addr4);}VOID AsicSetMcastWC( IN PRTMP_ADAPTER pAd) { MAC_TABLE_ENTRY *pEntry = &pAd->MacTab.Content[MCAST_WCID]; USHORT offset; pEntry->Sst = SST_ASSOC; pEntry->Aid = MCAST_WCID; // Softap supports 1 BSSID and use WCID=0 as multicast Wcid index pEntry->PsMode = PWR_ACTIVE; pEntry->CurrTxRate = pAd->CommonCfg.MlmeRate; offset = MAC_WCID_BASE + BSS0Mcast_WCID * HW_WCID_ENTRY_SIZE;}/* ========================================================================== Description: IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicDelWcidTab( IN PRTMP_ADAPTER pAd, IN UCHAR Wcid) { ULONG Addr0 = 0x0, Addr1 = 0x0; ULONG offset; DBGPRINT(RT_DEBUG_TRACE, ("AsicDelWcidTab==>Wcid = 0x%x\n",Wcid)); offset = MAC_WCID_BASE + Wcid * HW_WCID_ENTRY_SIZE; RTMP_IO_WRITE32(pAd, offset, Addr0); offset += 4; RTMP_IO_WRITE32(pAd, offset, Addr1);}/* ========================================================================== Description: IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicEnableRDG( IN PRTMP_ADAPTER pAd) { TX_LINK_CFG_STRUC TxLinkCfg; UINT32 Data = 0; RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word); TxLinkCfg.field.TxRDGEn = 1; RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word); RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data); Data &= 0xFFFFFF00; Data |= 0x80; RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data); //OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_AGGREGATION_INUSED);}/* ========================================================================== Description: IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicDisableRDG( IN PRTMP_ADAPTER pAd) { TX_LINK_CFG_STRUC TxLinkCfg; UINT32 Data = 0; RTMP_IO_READ32(pAd, TX_LINK_CFG, &TxLinkCfg.word); TxLinkCfg.field.TxRDGEn = 0; RTMP_IO_WRITE32(pAd, TX_LINK_CFG, TxLinkCfg.word); RTMP_IO_READ32(pAd, EDCA_AC0_CFG, &Data); Data &= 0xFFFFFF00; //Data |= 0x20;#ifndef WIFI_TEST //if ( pAd->CommonCfg.bEnableTxBurst ) // Data |= 0x60; // for performance issue not set the TXOP to 0#endif if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_DYNAMIC_BE_TXOP_ACTIVE) #ifdef DOT11_N_SUPPORT && (pAd->MacTab.fAnyStationMIMOPSDynamic == FALSE)#endif // DOT11_N_SUPPORT // ) { // For CWC test, change txop from 0x30 to 0x20 in TxBurst mode if (pAd->CommonCfg.bEnableTxBurst) Data |= 0x20; } RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Data);}/* ========================================================================== Description: IRQL = PASSIVE_LEVEL IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicDisableSync( IN PRTMP_ADAPTER pAd) { BCN_TIME_CFG_STRUC csr; DBGPRINT(RT_DEBUG_TRACE, ("--->Disable TSF synchronization\n")); // 2003-12-20 disable TSF and TBTT while NIC in power-saving have side effect // that NIC will never wakes up because TSF stops and no more // TBTT interrupts pAd->TbttTickCount = 0; RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word); csr.field.bBeaconGen = 0; csr.field.bTBTTEnable = 0; csr.field.TsfSyncMode = 0; csr.field.bTsfTicking = 0; RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);}/* ========================================================================== Description: IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicEnableBssSync( IN PRTMP_ADAPTER pAd) { BCN_TIME_CFG_STRUC csr; DBGPRINT(RT_DEBUG_TRACE, ("--->AsicEnableBssSync(INFRA mode)\n")); RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr.word);// RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, 0x00000000);#ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { csr.field.BeaconInterval = pAd->CommonCfg.BeaconPeriod << 4; // ASIC register in units of 1/16 TU csr.field.bTsfTicking = 1; csr.field.TsfSyncMode = 1; // sync TSF in INFRASTRUCTURE mode csr.field.bBeaconGen = 0; // do NOT generate BEACON csr.field.bTBTTEnable = 1; }#endif // CONFIG_STA_SUPPORT // RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr.word);}/* ========================================================================== Description: Note: BEACON frame in shared memory should be built ok before this routine can be called. Otherwise, a garbage frame maybe transmitted out every Beacon period. IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicEnableIbssSync( IN PRTMP_ADAPTER pAd){ BCN_TIME_CFG_STRUC csr9; PUCHAR ptr; UINT i; DBGPRINT(RT_DEBUG_TRACE, ("--->AsicEnableIbssSync(ADHOC mode. MPDUtotalByteCount = %d)\n", pAd->BeaconTxWI.MPDUtotalByteCount)); RTMP_IO_READ32(pAd, BCN_TIME_CFG, &csr9.word); csr9.field.bBeaconGen = 0; csr9.field.bTBTTEnable = 0; csr9.field.bTsfTicking = 0; RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr9.word);#ifdef RTMP_MAC_USB // move BEACON TXD and frame content to on-chip memory ptr = (PUCHAR)&pAd->BeaconTxWI; for (i=0; i<TXWI_SIZE; i+=2) // 16-byte TXWI field { //UINT32 longptr = *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24); //RTMP_IO_WRITE32(pAd, HW_BEACON_BASE0 + i, longptr); RTUSBMultiWrite(pAd, HW_BEACON_BASE0 + i, ptr, 2); ptr += 2; } // start right after the 16-byte TXWI field ptr = pAd->BeaconBuf; for (i=0; i< pAd->BeaconTxWI.MPDUtotalByteCount; i+=2) { //UINT32 longptr = *ptr + (*(ptr+1)<<8) + (*(ptr+2)<<16) + (*(ptr+3)<<24); //RTMP_IO_WRITE32(pAd, HW_BEACON_BASE0 + TXWI_SIZE + i, longptr); RTUSBMultiWrite(pAd, HW_BEACON_BASE0 + TXWI_SIZE + i, ptr, 2); ptr +=2; }#endif // RTMP_MAC_USB // // // For Wi-Fi faily generated beacons between participating stations. // Set TBTT phase adaptive adjustment step to 8us (default 16us) // don't change settings 2006-5- by Jerry //RTMP_IO_WRITE32(pAd, TBTT_SYNC_CFG, 0x00001010); // start sending BEACON csr9.field.BeaconInterval = pAd->CommonCfg.BeaconPeriod << 4; // ASIC register in units of 1/16 TU csr9.field.bTsfTicking = 1; csr9.field.TsfSyncMode = 2; // sync TSF in IBSS mode csr9.field.bTBTTEnable = 1; csr9.field.bBeaconGen = 1; RTMP_IO_WRITE32(pAd, BCN_TIME_CFG, csr9.word);}/* ========================================================================== Description: IRQL = PASSIVE_LEVEL IRQL = DISPATCH_LEVEL ========================================================================== */VOID AsicSetEdcaParm( IN PRTMP_ADAPTER pAd, IN PEDCA_PARM pEdcaParm){ EDCA_AC_CFG_STRUC Ac0Cfg, Ac1Cfg, Ac2Cfg, Ac3Cfg; AC_TXOP_CSR0_STRUC csr0; AC_TXOP_CSR1_STRUC csr1; AIFSN_CSR_STRUC AifsnCsr; CWMIN_CSR_STRUC CwminCsr; CWMAX_CSR_STRUC CwmaxCsr; int i; Ac0Cfg.word = 0; Ac1Cfg.word = 0; Ac2Cfg.word = 0; Ac3Cfg.word = 0; if ((pEdcaParm == NULL) || (pEdcaParm->bValid == FALSE)) { DBGPRINT(RT_DEBUG_TRACE,("AsicSetEdcaParm\n")); OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WMM_INUSED); for (i=0; i<MAX_LEN_OF_MAC_TABLE; i++) { if (pAd->MacTab.Content[i].ValidAsCLI || pAd->MacTab.Content[i].ValidAsApCli) CLIENT_STATUS_CLEAR_FLAG(&pAd->MacTab.Content[i], fCLIENT_STATUS_WMM_CAPABLE); } //======================================================== // MAC Register has a copy . //========================================================//#ifndef WIFI_TEST if( pAd->CommonCfg.bEnableTxBurst ) { // For CWC test, change txop from 0x30 to 0x20 in TxBurst mode Ac0Cfg.field.AcTxop = 0x20; // Suggest by John for TxBurst in HT Mode } else Ac0Cfg.field.AcTxop = 0; // QID_AC_BE//#else// Ac0Cfg.field.AcTxop = 0; // QID_AC_BE//#endif Ac0Cfg.field.Cwmin = CW_MIN_IN_BITS; Ac0Cfg.field.Cwmax = CW_MAX_IN_BITS; Ac0Cfg.field.Aifsn = 2; RTMP_IO_WRITE32(pAd, EDCA_AC0_CFG, Ac0Cfg.word); Ac1Cfg.field.AcTxop = 0; // QID_AC_BK Ac1Cfg.field.Cwmin = CW_MIN_IN_BITS; Ac1Cfg.field.Cwmax = CW_MAX_IN_BITS; Ac1Cfg.field.Aifsn = 2; RTMP_IO_WRITE32(pAd, EDCA_AC1_CFG, Ac1Cfg.word); if (pAd->CommonCfg.PhyMode == PHY_11B) { Ac2Cfg.field.AcTxop = 192; // AC_VI: 192*32us ~= 6ms Ac3Cfg.field.AcTxop = 96; // AC_VO: 96*32us ~= 3ms } else { Ac2Cfg.field.AcTxop = 96; // AC_VI: 96*32us ~= 3ms Ac3Cfg.field.AcTxop = 48; // AC_VO: 48*32us ~= 1.5ms } Ac2Cfg.field.Cwmin = CW_MIN_IN_BITS; Ac2Cfg.field.Cwmax = CW_MAX_IN_BITS; Ac2Cfg.field.Aifsn = 2; RTMP_IO_WRITE32(pAd, EDCA_AC2_CFG, Ac2Cfg.word); Ac3Cfg.field.Cwmin = CW_MIN_IN_BITS; Ac3Cfg.field.Cwmax = CW_MAX_IN_BITS; Ac3Cfg.field.Aifsn = 2; RTMP_IO_WRITE32(pAd, EDCA_AC3_CFG, Ac3Cfg.word); //======================================================== // DMA Register has a copy too. //======================================================== csr0.field.Ac0Txop = 0; // QID_AC_BE csr0.field.Ac1Txop = 0; // QID_AC_BK RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word); if (pAd->CommonCfg.PhyMode == PHY_11B) { csr1.field.Ac2Txop = 192; // AC_VI: 192*32us ~= 6ms csr1.field.Ac3Txop = 96; // AC_VO: 96*32us ~= 3ms } else { csr1.field.Ac2Txop = 96; // AC_VI: 96*32us ~= 3ms csr1.field.Ac3Txop = 48; // AC_VO: 48*32us ~= 1.5ms } RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr1.word); CwminCsr.word = 0; CwminCsr.field.Cwmin0 = CW_MIN_IN_BITS; CwminCsr.field.Cwmin1 = CW_MIN_IN_BITS; CwminCsr.field.Cwmin2 = CW_MIN_IN_BITS; CwminCsr.field.Cwmin3 = CW_MIN_IN_BITS; RTMP_IO_WRITE32(pAd, WMM_CWMIN_CFG, CwminCsr.word); CwmaxCsr.word = 0; CwmaxCsr.field.Cwmax0 = CW_MAX_IN_BITS; CwmaxCsr.field.Cwmax1 = CW_MAX_IN_BITS; CwmaxCsr.field.Cwmax2 = CW_MAX_IN_BITS; CwmaxCsr.field.Cwmax3 = CW_MAX_IN_BITS; RTMP_IO_WRITE32(pAd, WMM_CWMAX_CFG, CwmaxCsr.word); RTMP_IO_WRITE32(pAd, WMM_AIFSN_CFG, 0x00002222); NdisZeroMemory(&pAd->CommonCfg.APEdcaParm, sizeof(EDCA_PARM)); } else { OPSTATUS_SET_FLAG(pAd, fOP_STATUS_WMM_INUSED); //======================================================== // MAC Register has a copy. //======================================================== // // Modify Cwmin/Cwmax/Txop on queue[QID_AC_VI], Recommend by Jerry 2005/07/27 // To degrade our VIDO Queue's throughput for WiFi WMM S3T07 Issue. // //pEdcaParm->Txop[QID_AC_VI] = pEdcaParm->Txop[QID_AC_VI] * 7 / 10; // rt2860c need this Ac0Cfg.field.AcTxop = pEdcaParm->Txop[QID_AC_BE]; Ac0Cfg.field.Cwmin= pEdcaParm->Cwmin[QID_AC_BE]; Ac0Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_BE]; Ac0Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_BE]; //+1; Ac1Cfg.field.AcTxop = pEdcaParm->Txop[QID_AC_BK]; Ac1Cfg.field.Cwmin = pEdcaParm->Cwmin[QID_AC_BK]; //+2; Ac1Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_BK]; Ac1Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_BK]; //+1; Ac2Cfg.field.AcTxop = (pEdcaParm->Txop[QID_AC_VI] * 6) / 10; if(pAd->Antenna.field.TxPath == 1) { Ac2Cfg.field.Cwmin = pEdcaParm->Cwmin[QID_AC_VI] + 1; Ac2Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_VI] + 1; } else { Ac2Cfg.field.Cwmin = pEdcaParm->Cwmin[QID_AC_VI]; Ac2Cfg.field.Cwmax = pEdcaParm->Cwmax[QID_AC_VI]; } Ac2Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_VI] + 1;#ifdef RTMP_MAC_USB Ac2Cfg.field.Aifsn = pEdcaParm->Aifsn[QID_AC_VI] + 3;#endif // RTMP_MAC_USB // #ifdef INF_AMAZON_SE#endif // INF_AMAZON_SE //#ifdef CONFIG_STA_SUPPORT IF_DEV_CONFIG_OPMODE_ON_STA(pAd) { // Tuning for Wi-Fi WMM S06 if (pAd->CommonCfg.bWiFiTest && pEdcaParm->Aifsn[QID_AC_VI] == 10) Ac2Cfg.field.Aifsn -= 1; // Tuning for TGn Wi-Fi 5.2.32
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