guide_tech1.txt

nintendo64 survival document

1. CPU overview


RISC R4300 series.

32 general registers, of which Nintendo has given a naming convention.

R0    = value '0'. Hard-wired.
T0-T9 = scratch registers. CPU RAM.
S0-S7 = registers saved upon function protocol. Trash at will if you know how.
A0-A3 = parameter passing to subroutines. Formal but not rigid.
RA    = return address from subroutine. Not pulled from 'stack'. Change at convenience.
V0-V1 = arithmetic values, function return values.
SP    = stack pointer. Informal.
AT    = assembler temporary. Free use.

These are formal definitions but not strictly enforced. Except R0.

; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

BYTE        = 8-bits
HALF-WORD   = 16-bits
WORD        = 32-bits
DOUBLE WORD = 64-bits

As lower-level coders, it's best to respect the alignment boundaries.

Data         Multiples of *
----         --------------
BYTE              1
HALF-WORD         2
WORD              4
DWORD             8
  
So WORD goes to multiples of 4 (0,4,8,C).

You may get an exception otherwise. Especially with DMA transfers.

Instructions are WORD sized (32-bits). So keep data at proper addresses.

; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

In addition to the CPU, we get three additional coprocessors (COPs).

COP0 = memory management unit (MMU). Better known as 'virtual memory'.
COP1 = floating-point unit (FPU).
COP2 = video coprocessor (RCP).

; ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Branch delays.

When performing branches, a 1-cycle delay is incurred.

So 'beq r0,r0,8006D234h' would also execute the instruction following it.
There is a limit on which opcodes can be placed in the delay slot.

Note that 'beq r0,r0,TARGET' is effectively 'bra TARGET'.


ex. Mario Golf
[1120:0027] 800B0130: BEQ     t1[800FBBD0],r0[00000000],800B01D0h
[0000:0000] 800B0134: NOP
                      (delay slot = NOP)

[0c02:c0d7] 800B01B4: JAL     800B035C
[0120:2021] 800B01B8: ADDU    a0[00000038],t1[800FBBD0],r0[00000000]
                      (delay slot = ADDU)


There is a 'likely' version (BEQL). If the branch is taken, then use
the delay. Otherwise it is skipped.


For our hobbyist purposes, it is much safer to always inefficiently waste
a 'NOP' in the slot.

If speed is needed, then optimize after the code works.