i2c_fpga.tan.summary

利用I2c读取E2prom Verilog 代码

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 6.591 ns
From           : sda
To             : i2c:inst4|sda_buf
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 16.479 ns
From           : i2c:inst4|seg_data[5]
To             : seg7[5]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -1.210 ns
From           : sda
To             : i2c:inst4|readData_reg[0]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 79.99 MHz ( period = 12.501 ns )
From           : i2c_test:inst1|counter[0]
To             : i2c:inst4|writeData_reg[0]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'write'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 304.04 MHz ( period = 3.289 ns )
From           : i2c_test:inst1|counter[3]
To             : i2c_test:inst1|counter[3]
From Clock     : write
To Clock       : write
Failed Paths   : 0

Type           : Clock Hold: 'clk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : i2c:inst4|en[1]
To             : i2c:inst4|seg_data[1]
From Clock     : clk
To Clock       : clk
Failed Paths   : 70

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 70

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