📄 psocconfig.lis
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0000 ENDIF ; RAM_USE_CLASS_4
0000
0000 macro RAM_EPILOGUE( ACTUAL_CLASS )
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_1 )
0000 ; Nothing to do
0000 ENDIF ; RAM_USE_CLASS_1
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_2 )
0000 RAM_RESTORE_NATIVE_PAGING
0000 ENDIF ; RAM_USE_CLASS_2
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_3 )
0000 RAM_RESTORE_NATIVE_PAGING
0000 ENDIF ; RAM_USE_CLASS_3
0000
0000 IF ( @ACTUAL_CLASS & RAM_USE_CLASS_4 )
0000 ; Nothing to do
0000 ENDIF ; RAM_USE_CLASS_4
0000
0000 macro REG_PRESERVE( IOReg )
0000 mov A, reg[ @IOReg ]
0000 push A
0000 macro REG_RESTORE( IOReg )
0000 pop A
0000 mov reg[ @IOReg ], A
0000 macro ISR_PRESERVE_PAGE_POINTERS
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 REG_PRESERVE CUR_PP
0000 REG_PRESERVE IDX_PP
0000 REG_PRESERVE MVR_PP
0000 REG_PRESERVE MVW_PP
0000 ENDIF
0000 macro ISR_RESTORE_PAGE_POINTERS
0000 IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 REG_RESTORE MVW_PP
0000 REG_RESTORE MVR_PP
0000 REG_RESTORE IDX_PP
0000 REG_RESTORE CUR_PP
0000 ENDIF
0002 CPU_CLOCK: equ 2h ;CPU clock value
0007 CPU_CLOCK_MASK: equ 7h ;CPU clock mask
0002 CPU_CLOCK_JUST: equ 2h ;CPU clock value justified
0000 SLEEP_TIMER: equ 0h ;Sleep Timer value
0018 SLEEP_TIMER_MASK: equ 18h ;Sleep Timer mask
0000 SLEEP_TIMER_JUST: equ 0h ;Sleep Timer value justified
0001 SWITCH_MODE_PUMP: equ 1h ;Switch Mode Pump setting
0080 SWITCH_MODE_PUMP_MASK: equ 80h ;Switch Mode Pump mask
0080 SWITCH_MODE_PUMP_JUST: equ 80h ;Switch Mode Pump justified
0000 LVD_TBEN: equ 0 ; Low Voltage Throttle-back enable value
0008 LVD_TBEN_MASK: equ 8 ; Low Voltage Throttle-back enable mask
0000 LVD_TBEN_JUST: equ 0 ; Low Voltage Throttle-back enable justified
0007 TRIP_VOLTAGE: equ 7h ;Trip Voltage value
0007 TRIP_VOLTAGE_MASK: equ 7h ;Trip Voltage mask
0007 TRIP_VOLTAGE_JUST: equ 7h ;Trip Voltage justified
0000
0010 POWER_SETTING: equ 10h
0010 POWER_SET_5V0: equ 10h ; MASK for 5.0V operation, fast and slow
0010 POWER_SET_5V0_24MHZ: equ 10h ; Power Setting value for 5.0V fast
0011 POWER_SET_5V0_6MHZ: equ 11h ; Power Setting value for 5.0V slow
0008 POWER_SET_3V3: equ 08h ; MASK for 3.3V operation, fast and slow
0008 POWER_SET_3V3_24MHZ: equ 08h ; Power Setting value for 3.3V fast
0009 POWER_SET_3V3_6MHZ: equ 09h ; Power Setting value for 3.3V slow
0006 POWER_SET_2V7: equ 06h ; MASK for 2.7V operation, fast and slow
0004 POWER_SET_2V7_12MHZ: equ 04h ; MASK for 2.7V, 12MHZ operation
0002 POWER_SET_2V7_6MHZ: equ 02h ; MASK for 2.7V, 6MHZ operation
0001 POWER_SET_SLOW_IMO: equ 01h ; MASK for slow Internal Main Oscillator (IMO)
0000
0000 COMM_RX_PRESENT: equ 0 ;1 = TRUE
0000 WATCHDOG_ENABLE: equ 0 ;Watchdog Enable 1 = Enable
0000
000F CLOCK_DIV_VC1: equ fh ;VC1 clock divider
00F0 CLOCK_DIV_VC1_MASK: equ f0h ;VC1 clock divider mask
00F0 CLOCK_DIV_VC1_JUST: equ f0h ;VC1 clock divider justified
000E CLOCK_DIV_VC2: equ eh ;VC2 clock divider
000F CLOCK_DIV_VC2_MASK: equ fh ;VC2 clock divider mask
000E CLOCK_DIV_VC2_JUST: equ eh ;VC2 clock divider justified
0002 CLOCK_INPUT_VC3: equ 2h ;VC3 clock source
0003 CLOCK_INPUT_VC3_MASK: equ 3h ;VC3 clock source mask
0002 CLOCK_INPUT_VC3_JUST: equ 2h ;VC3 clock source justified
00F9 CLOCK_DIV_VC3: equ f9h ;VC3 clock divider
00FF CLOCK_DIV_VC3_MASK: equ ffh ;VC3 clock divider mask
00F9 CLOCK_DIV_VC3_JUST: equ f9h ;VC3 clock divider justified
0000 SYSCLK_SOURCE: equ (0h | 0h) ;SysClk Source setting
0006 SYSCLK_SOURCE_MASK: equ (4h | 2h) ;SysClk Source setting mask
0000 SYSCLK_SOURCE_JUST: equ (0h | 0h) ;SysClk Source setting justified
0000 SYSCLK_2_DISABLE: equ 0h ;SysClk*2 Disable setting
0001 SYSCLK_2_DISABLE_MASK: equ 1h ;SysClk*2 Disable setting mask
0000 SYSCLK_2_DISABLE_JUST: equ 0h ;SysClk*2 Disable setting justified
0000 ;
0000 ; register initial values
0000 ;
0000 ANALOG_IO_CONTROL: equ 0h ;Analog IO Control register (ABF_CR)
0000 PORT_0_GLOBAL_SELECT: equ 0h ;Port 0 global select register (PRT0GS)
00A8 PORT_0_DRIVE_0: equ a8h ;Port 0 drive mode 0 register (PRT0DM0)
0057 PORT_0_DRIVE_1: equ 57h ;Port 0 drive mode 1 register (PRT0DM1)
0057 PORT_0_DRIVE_2: equ 57h ;Port 0 drive mode 2 register (PRT0DM2)
0000 PORT_0_INTENABLE: equ 0h ;Port 0 interrupt enable register (PRT0IE)
0000 PORT_0_INTCTRL_0: equ 0h ;Port 0 interrupt control 0 register (PRT0IC0)
0000 PORT_0_INTCTRL_1: equ 0h ;Port 0 interrupt control 1 register (PRT0IC1)
0000 PORT_1_GLOBAL_SELECT: equ 0h ;Port 1 global select register (PRT1GS)
000B PORT_1_DRIVE_0: equ bh ;Port 1 drive mode 0 register (PRT1DM0)
00F7 PORT_1_DRIVE_1: equ f7h ;Port 1 drive mode 1 register (PRT1DM1)
00F7 PORT_1_DRIVE_2: equ f7h ;Port 1 drive mode 2 register (PRT1DM2)
0000 PORT_1_INTENABLE: equ 0h ;Port 1 interrupt enable register (PRT1IE)
0000 PORT_1_INTCTRL_0: equ 0h ;Port 1 interrupt control 0 register (PRT1IC0)
0000 PORT_1_INTCTRL_1: equ 0h ;Port 1 interrupt control 1 register (PRT1IC1)
0000 PORT_2_GLOBAL_SELECT: equ 0h ;Port 2 global select register (PRT2GS)
0000 PORT_2_DRIVE_0: equ 0h ;Port 2 drive mode 0 register (PRT2DM0)
00FF PORT_2_DRIVE_1: equ ffh ;Port 2 drive mode 1 register (PRT2DM1)
00FF PORT_2_DRIVE_2: equ ffh ;Port 2 drive mode 2 register (PRT2DM2)
0000 PORT_2_INTENABLE: equ 0h ;Port 2 interrupt enable register (PRT2IE)
0000 PORT_2_INTCTRL_0: equ 0h ;Port 2 interrupt control 0 register (PRT2IC0)
0000 PORT_2_INTCTRL_1: equ 0h ;Port 2 interrupt control 1 register (PRT2IC1)
0002 PORT_3_GLOBAL_SELECT: equ 2h ;Port 3 global select register (PRT3GS)
0002 PORT_3_DRIVE_0: equ 2h ;Port 3 drive mode 0 register (PRT3DM0)
000F PORT_3_DRIVE_1: equ fh ;Port 3 drive mode 1 register (PRT3DM1)
000F PORT_3_DRIVE_2: equ fh ;Port 3 drive mode 2 register (PRT3DM2)
0000 PORT_3_INTENABLE: equ 0h ;Port 3 interrupt enable register (PRT3IE)
0000 PORT_3_INTCTRL_0: equ 0h ;Port 3 interrupt control 0 register (PRT3IC0)
0000 PORT_3_INTCTRL_1: equ 0h ;Port 3 interrupt control 1 register (PRT3IC1)
0000
0000 ; end of file GlobalParams.inc
0000
export LoadConfigInit
export _LoadConfigInit
export LoadConfig_hbtouchkey
export _LoadConfig_hbtouchkey
export UnloadConfig_hbtouchkey
export _UnloadConfig_hbtouchkey
export ReloadConfig_hbtouchkey
export _ReloadConfig_hbtouchkey
export LoadConfig_Config1
export _LoadConfig_Config1
export UnloadConfig_Config1
export _UnloadConfig_Config1
export UnloadConfig_Total
export _UnloadConfig_Total
export ACTIVE_CONFIG_STATUS
export Port_0_Data_SHADE
export _Port_0_Data_SHADE
export Port_1_Data_SHADE
export _Port_1_Data_SHADE
export Port_2_Data_SHADE
export _Port_2_Data_SHADE
export Port_3_Data_SHADE
export _Port_3_Data_SHADE
export NO_SHADOW
export _NO_SHADOW
0010 FLAG_CFG_MASK: equ 10h ;M8C flag register REG address bit mask
00FF END_CONFIG_TABLE: equ ffh ;end of config table indicator
0000
AREA psoc_config(rom, rel)
;---------------------------------------------------------------------------
; LoadConfigInit - Establish the start-up configuration (except for a few
; parameters handled by boot code, like CPU speed). This
; function can be called from user code, but typically it
; is only called from boot.
;
; INPUTS: None.
; RETURNS: Nothing.
; SIDE EFFECTS: Registers are volatile: the A and X registers can be modified!
; In the large memory model currently only the page
; pointer registers listed below are modified. This does
; not guarantee that in future implementations of this
; function other page pointer registers will not be
; modified.
;
; Page Pointer Registers Modified:
; CUR_PP
;
0000 _LoadConfigInit:
0000 LoadConfigInit:
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_1 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_1
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_2 )
IF ( SYSTEM_IDXPG_TRACKS_IDX_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
or F, FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_2
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_3 )
IF ( SYSTEM_IDXPG_TRACKS_STK_PP )
IF ( SYSTEM_LARGE_MEMORY_MODEL )
and F, ~FLAG_PGMODE_01b
ENDIF ; SYSTEM_LARGE_MEMORY_MODEL
ENDIF
ENDIF ; RAM_USE_CLASS_3
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_4 )
; Nothing to do
ENDIF ; RAM_USE_CLASS_4
IF ( SYSTEM_LARGE_MEMORY_MODEL )
0000 62D000 mov reg[CUR_PP], >ACTIVE_CONFIG_STATUS
ENDIF
0003 550000 mov [ACTIVE_CONFIG_STATUS], 0
0006
0006 550100 mov [Port_0_Data_SHADE], 0h
0009 550200 mov [Port_1_Data_SHADE], 0h
000C 550300 mov [Port_2_Data_SHADE], 0h
000F 550400 mov [Port_3_Data_SHADE], 0h
0012
0012 7C0000 lcall LoadConfigTBL_hbtouchkey_Ordered
0015 7C0019 lcall LoadConfig_hbtouchkey
0018
0018
IF ( RAM_USE_CLASS_4 & RAM_USE_CLASS_1 )
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