shub_mmr_t.h
来自「优龙2410linux2.6.8内核源代码」· C头文件 代码 · 共 1,825 行 · 第 1/5 页
H
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typedef union sh_rtc1_int_enable_u { mmr_t sh_rtc1_int_enable_regval; struct { mmr_t rtc1_enable : 1; mmr_t reserved_0 : 63; } sh_rtc1_int_enable_s;} sh_rtc1_int_enable_u_t;/* ==================================================================== *//* Register "SH_RTC2_INT_CONFIG" *//* SHub RTC 2 Interrupt Config Registers *//* ==================================================================== */typedef union sh_rtc2_int_config_u { mmr_t sh_rtc2_int_config_regval; struct { mmr_t type : 3; mmr_t agt : 1; mmr_t pid : 16; mmr_t reserved_0 : 1; mmr_t base : 29; mmr_t reserved_1 : 2; mmr_t idx : 8; mmr_t reserved_2 : 4; } sh_rtc2_int_config_s;} sh_rtc2_int_config_u_t;/* ==================================================================== *//* Register "SH_RTC2_INT_ENABLE" *//* SHub RTC 2 Interrupt Enable Registers *//* ==================================================================== */typedef union sh_rtc2_int_enable_u { mmr_t sh_rtc2_int_enable_regval; struct { mmr_t rtc2_enable : 1; mmr_t reserved_0 : 63; } sh_rtc2_int_enable_s;} sh_rtc2_int_enable_u_t;/* ==================================================================== *//* Register "SH_RTC3_INT_CONFIG" *//* SHub RTC 3 Interrupt Config Registers *//* ==================================================================== */typedef union sh_rtc3_int_config_u { mmr_t sh_rtc3_int_config_regval; struct { mmr_t type : 3; mmr_t agt : 1; mmr_t pid : 16; mmr_t reserved_0 : 1; mmr_t base : 29; mmr_t reserved_1 : 2; mmr_t idx : 8; mmr_t reserved_2 : 4; } sh_rtc3_int_config_s;} sh_rtc3_int_config_u_t;/* ==================================================================== *//* Register "SH_RTC3_INT_ENABLE" *//* SHub RTC 3 Interrupt Enable Registers *//* ==================================================================== */typedef union sh_rtc3_int_enable_u { mmr_t sh_rtc3_int_enable_regval; struct { mmr_t rtc3_enable : 1; mmr_t reserved_0 : 63; } sh_rtc3_int_enable_s;} sh_rtc3_int_enable_u_t;/* ==================================================================== *//* Register "SH_EVENT_OCCURRED" *//* SHub Interrupt Event Occurred *//* ==================================================================== */typedef union sh_event_occurred_u { mmr_t sh_event_occurred_regval; struct { mmr_t pi_hw_int : 1; mmr_t md_hw_int : 1; mmr_t xn_hw_int : 1; mmr_t lb_hw_int : 1; mmr_t ii_hw_int : 1; mmr_t pi_ce_int : 1; mmr_t md_ce_int : 1; mmr_t xn_ce_int : 1; mmr_t pi_uce_int : 1; mmr_t md_uce_int : 1; mmr_t xn_uce_int : 1; mmr_t proc0_adv_int : 1; mmr_t proc1_adv_int : 1; mmr_t proc2_adv_int : 1; mmr_t proc3_adv_int : 1; mmr_t proc0_err_int : 1; mmr_t proc1_err_int : 1; mmr_t proc2_err_int : 1; mmr_t proc3_err_int : 1; mmr_t system_shutdown_int : 1; mmr_t uart_int : 1; mmr_t l1_nmi_int : 1; mmr_t stop_clock : 1; mmr_t rtc0_int : 1; mmr_t rtc1_int : 1; mmr_t rtc2_int : 1; mmr_t rtc3_int : 1; mmr_t profile_int : 1; mmr_t ipi_int : 1; mmr_t ii_int0 : 1; mmr_t ii_int1 : 1; mmr_t reserved_0 : 33; } sh_event_occurred_s;} sh_event_occurred_u_t;/* ==================================================================== *//* Register "SH_EVENT_OVERFLOW" *//* SHub Interrupt Event Occurred Overflow *//* ==================================================================== */typedef union sh_event_overflow_u { mmr_t sh_event_overflow_regval; struct { mmr_t pi_hw_int : 1; mmr_t md_hw_int : 1; mmr_t xn_hw_int : 1; mmr_t lb_hw_int : 1; mmr_t ii_hw_int : 1; mmr_t pi_ce_int : 1; mmr_t md_ce_int : 1; mmr_t xn_ce_int : 1; mmr_t pi_uce_int : 1; mmr_t md_uce_int : 1; mmr_t xn_uce_int : 1; mmr_t proc0_adv_int : 1; mmr_t proc1_adv_int : 1; mmr_t proc2_adv_int : 1; mmr_t proc3_adv_int : 1; mmr_t proc0_err_int : 1; mmr_t proc1_err_int : 1; mmr_t proc2_err_int : 1; mmr_t proc3_err_int : 1; mmr_t system_shutdown_int : 1; mmr_t uart_int : 1; mmr_t l1_nmi_int : 1; mmr_t stop_clock : 1; mmr_t rtc0_int : 1; mmr_t rtc1_int : 1; mmr_t rtc2_int : 1; mmr_t rtc3_int : 1; mmr_t profile_int : 1; mmr_t reserved_0 : 36; } sh_event_overflow_s;} sh_event_overflow_u_t;/* ==================================================================== *//* Register "SH_JUNK_BUS_TIME" *//* Junk Bus Timing *//* ==================================================================== */typedef union sh_junk_bus_time_u { mmr_t sh_junk_bus_time_regval; struct { mmr_t fprom_setup_hold : 8; mmr_t fprom_enable : 8; mmr_t uart_setup_hold : 8; mmr_t uart_enable : 8; mmr_t reserved_0 : 32; } sh_junk_bus_time_s;} sh_junk_bus_time_u_t;/* ==================================================================== *//* Register "SH_JUNK_LATCH_TIME" *//* Junk Bus Latch Timing *//* ==================================================================== */typedef union sh_junk_latch_time_u { mmr_t sh_junk_latch_time_regval; struct { mmr_t setup_hold : 3; mmr_t reserved_0 : 61; } sh_junk_latch_time_s;} sh_junk_latch_time_u_t;/* ==================================================================== *//* Register "SH_JUNK_NACK_RESET" *//* Junk Bus Nack Counter Reset *//* ==================================================================== */typedef union sh_junk_nack_reset_u { mmr_t sh_junk_nack_reset_regval; struct { mmr_t pulse : 1; mmr_t reserved_0 : 63; } sh_junk_nack_reset_s;} sh_junk_nack_reset_u_t;/* ==================================================================== *//* Register "SH_JUNK_BUS_LED0" *//* Junk Bus LED0 *//* ==================================================================== */typedef union sh_junk_bus_led0_u { mmr_t sh_junk_bus_led0_regval; struct { mmr_t led0_data : 8; mmr_t reserved_0 : 56; } sh_junk_bus_led0_s;} sh_junk_bus_led0_u_t;/* ==================================================================== *//* Register "SH_JUNK_BUS_LED1" *//* Junk Bus LED1 *//* ==================================================================== */typedef union sh_junk_bus_led1_u { mmr_t sh_junk_bus_led1_regval; struct { mmr_t led1_data : 8; mmr_t reserved_0 : 56; } sh_junk_bus_led1_s;} sh_junk_bus_led1_u_t;/* ==================================================================== *//* Register "SH_JUNK_BUS_LED2" *//* Junk Bus LED2 *//* ==================================================================== */typedef union sh_junk_bus_led2_u { mmr_t sh_junk_bus_led2_regval; struct { mmr_t led2_data : 8; mmr_t reserved_0 : 56; } sh_junk_bus_led2_s;} sh_junk_bus_led2_u_t;/* ==================================================================== *//* Register "SH_JUNK_BUS_LED3" *//* Junk Bus LED3 *//* ==================================================================== */typedef union sh_junk_bus_led3_u { mmr_t sh_junk_bus_led3_regval; struct { mmr_t led3_data : 8; mmr_t reserved_0 : 56; } sh_junk_bus_led3_s;} sh_junk_bus_led3_u_t;/* ==================================================================== *//* Register "SH_JUNK_ERROR_STATUS" *//* Junk Bus Error Status *//* ==================================================================== */typedef union sh_junk_error_status_u { mmr_t sh_junk_error_status_regval; struct { mmr_t address : 47; mmr_t reserved_0 : 1; mmr_t cmd : 8; mmr_t mode : 1; mmr_t status : 4; mmr_t reserved_1 : 3; } sh_junk_error_status_s;} sh_junk_error_status_u_t;/* ==================================================================== *//* Register "SH_NI0_LLP_STAT" *//* This register describes the LLP status. *//* ==================================================================== */typedef union sh_ni0_llp_stat_u { mmr_t sh_ni0_llp_stat_regval; struct { mmr_t link_reset_state : 4; mmr_t reserved_0 : 60; } sh_ni0_llp_stat_s;} sh_ni0_llp_stat_u_t;/* ==================================================================== *//* Register "SH_NI0_LLP_RESET" *//* Writing issues a reset to the network interface *//* ==================================================================== */typedef union sh_ni0_llp_reset_u { mmr_t sh_ni0_llp_reset_regval; struct { mmr_t link : 1; mmr_t warm : 1; mmr_t reserved_0 : 62; } sh_ni0_llp_reset_s;} sh_ni0_llp_reset_u_t;/* ==================================================================== *//* Register "SH_NI0_LLP_RESET_EN" *//* Controls LLP warm reset propagation *//* ==================================================================== */typedef union sh_ni0_llp_reset_en_u { mmr_t sh_ni0_llp_reset_en_regval; struct { mmr_t ok : 1; mmr_t reserved_0 : 63; } sh_ni0_llp_reset_en_s;} sh_ni0_llp_reset_en_u_t;/* ==================================================================== *//* Register "SH_NI0_LLP_CHAN_MODE" *//* Sets the signaling mode of LLP and channel *//* ==================================================================== */typedef union sh_ni0_llp_chan_mode_u { mmr_t sh_ni0_llp_chan_mode_regval; struct { mmr_t bitmode32 : 1; mmr_t ac_encode : 1; mmr_t enable_tuning : 1; mmr_t enable_rmt_ft_upd : 1; mmr_t enable_clkquad : 1; mmr_t reserved_0 : 59; } sh_ni0_llp_chan_mode_s;} sh_ni0_llp_chan_mode_u_t;/* ==================================================================== *//* Register "SH_NI0_LLP_CONFIG" *//* Sets the configuration of LLP and channel *//* ==================================================================== */typedef union sh_ni0_llp_config_u { mmr_t sh_ni0_llp_config_regval; struct { mmr_t maxburst : 10; mmr_t maxretry : 10; mmr_t nulltimeout : 6; mmr_t ftu_time : 12; mmr_t reserved_0 : 26; } sh_ni0_llp_config_s;} sh_ni0_llp_config_u_t;/* ==================================================================== *//* Register "SH_NI0_LLP_TEST_CTL" *//* ==================================================================== */typedef union sh_ni0_llp_test_ctl_u { mmr_t sh_ni0_llp_test_ctl_regval; struct { mmr_t pattern : 40; mmr_t send_test_mode : 2; mmr_t reserved_0 : 2; mmr_t wire_sel : 6; mmr_t reserved_1 : 2; mmr_t lfsr_mode : 2; mmr_t noise_mode : 2; mmr_t armcapture : 1; mmr_t capturecbonly : 1; mmr_t sendcberror : 1; mmr_t sendsnerror : 1; mmr_t fakesnerror : 1; mmr_t captured : 1; mmr_t cberror : 1; mmr_t reserved_2 : 1; } sh_ni0_llp_test_ctl_s;} sh_ni0_llp_test_ctl_u_t;/* ==================================================================== */
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