init.c

优龙2410linux2.6.8内核源代码

		break;
        case 1360:
	        if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
                break;
        case 1400:
		if(VGAEngine == SIS_315_VGA) {
	           if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
		}
		break;
	case 1600:
		if(VGAEngine == SIS_315_VGA) {
		   if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
	              if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
		   }
		}
		break;
	case 1680:
		if(VGAEngine == SIS_315_VGA) {
		   if(VBFlags & (VB_301B|VB_301C|VB_302B)) {
	              if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
		   }
		}
		break;
   }

   return ModeIndex;
}


/*********************************************/
/*          HELPER: SetReg, GetReg           */
/*********************************************/

void
SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data)
{
   OutPortByte(port,index);
   OutPortByte(port + 1,data);
}

void
SiS_SetRegByte(SISIOADDRESS port, USHORT data)
{
   OutPortByte(port,data);
}

void
SiS_SetRegShort(SISIOADDRESS port, USHORT data)
{
   OutPortWord(port,data);
}

void
SiS_SetRegLong(SISIOADDRESS port, ULONG data)
{
   OutPortLong(port,data);
}

UCHAR
SiS_GetReg(SISIOADDRESS port, USHORT index)
{
   OutPortByte(port,index);
   return(InPortByte(port + 1));
}

UCHAR
SiS_GetRegByte(SISIOADDRESS port)
{
   return(InPortByte(port));
}

USHORT
SiS_GetRegShort(SISIOADDRESS port)
{
   return(InPortWord(port));
}

ULONG
SiS_GetRegLong(SISIOADDRESS port)
{
   return(InPortLong(port));
}

void
SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR)
{
  USHORT temp;

  temp = SiS_GetReg(Port,Index);
  temp = (temp & (DataAND)) | DataOR;
  SiS_SetReg(Port,Index,temp);
}

void
SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND)
{
  USHORT temp;

  temp = SiS_GetReg(Port,Index);
  temp &= DataAND;
  SiS_SetReg(Port,Index,temp);
}

void
SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)
{
  USHORT temp;

  temp = SiS_GetReg(Port,Index);
  temp |= DataOR;
  SiS_SetReg(Port,Index,temp);
}

/*********************************************/
/*      HELPER: DisplayOn, DisplayOff        */
/*********************************************/

void
SiS_DisplayOn(SiS_Private *SiS_Pr)
{
   SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
}

void
SiS_DisplayOff(SiS_Private *SiS_Pr)
{
   SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
}


/*********************************************/
/*        HELPER: Init Port Addresses        */
/*********************************************/

void
SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
{
   SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
   SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
   SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
   SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
   SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
   SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
   SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
   SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
   SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
   SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
   SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
   SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
   SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
   SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;     /* Digital video interface registers (LCD) */
   SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;     /* 301 TV Encoder registers */
   SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;     /* 301 Macrovision registers */
   SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;     /* 301 VGA2 (and LCD) registers */
   SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; /* 301 palette address port registers */
   SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;                  /* DDC Port ( = P3C4, SR11/0A) */
   SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
   SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
}

/*********************************************/
/*             HELPER: GetSysFlags           */
/*********************************************/

static void
SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
{
   unsigned char cr5f, temp1, temp2;

   /* 661 and newer: NEVER write non-zero to SR11[7:4] */
   /* (SR11 is used for DDC and in enable/disablebridge) */
   SiS_Pr->SiS_SensibleSR11 = FALSE;
   SiS_Pr->SiS_MyCR63 = 0x63;
   if(HwInfo->jChipType >= SIS_330) {
      SiS_Pr->SiS_MyCR63 = 0x53;
      if(HwInfo->jChipType >= SIS_661) {
         SiS_Pr->SiS_SensibleSR11 = TRUE;
      }
   }

   /* You should use the macros, not these flags directly */

   SiS_Pr->SiS_SysFlags = 0;
   if(HwInfo->jChipType == SIS_650) {
      cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
      SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
      temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
      SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
      temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
      if((!temp1) || (temp2)) {
         switch(cr5f) {
	    case 0x80:
	    case 0x90:
	    case 0xc0:
	       SiS_Pr->SiS_SysFlags |= SF_IsM650;  break;
	    case 0xa0:
	    case 0xb0:
	    case 0xe0:
	       SiS_Pr->SiS_SysFlags |= SF_Is651;   break;
	 }
      } else {
         switch(cr5f) {
	    case 0x90:
	       temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
	       switch(temp1) {
	          case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
		  case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
		  default:   SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
	       }
	       break;
	    case 0xb0:
	       SiS_Pr->SiS_SysFlags |= SF_Is652;  break;
	    default:
	       SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
	 }
      }
   }
   if(HwInfo->jChipType == SIS_760) {
      temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78);
      if(temp1 & 0x30) SiS_Pr->SiS_SysFlags |= SF_760LFB;
   }
}

/*********************************************/
/*         HELPER: Init PCI & Engines        */
/*********************************************/

static void
SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
{
   switch(HwInfo->jChipType) {
   case SIS_300:
   case SIS_540:
   case SIS_630:
   case SIS_730:
      /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
       *     - RELOCATED VGA IO  (0x20)
       *     - MMIO ENABLE (0x1)
       */
      SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
      /*  - Enable 2D (0x40)
       *  - Enable 3D (0x02)
       *  - Enable 3D Vertex command fetch (0x10) ?
       *  - Enable 3D command parser (0x08) ?
       */
      SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
      break;
   case SIS_315H:
   case SIS_315:
   case SIS_315PRO:
   case SIS_650:
   case SIS_740:
   case SIS_330:
   case SIS_661:
   case SIS_741:
   case SIS_660:
   case SIS_760:
      SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
      /*  - Enable 2D (0x40)
       *  - Enable 3D (0x02)
       *  - Enable 3D vertex command fetch (0x10)
       *  - Enable 3D command parser (0x08)
       *  - Enable 3D G/L transformation engine (0x80)
       */
      SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
      break;
   case SIS_550:
      SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1);
      /* No 3D engine ! */
      /*  - Enable 2D (0x40)
       */
      SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x40);
   }
}

/*********************************************/
/*             HELPER: SetLVDSetc            */
/*********************************************/

void
SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
{
   USHORT temp;

   SiS_Pr->SiS_IF_DEF_LVDS = 0;
   SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
   SiS_Pr->SiS_IF_DEF_CH70xx = 0;
   SiS_Pr->SiS_IF_DEF_DSTN = 0;
   SiS_Pr->SiS_IF_DEF_FSTN = 0;
   SiS_Pr->SiS_IF_DEF_CONEX = 0;

   SiS_Pr->SiS_ChrontelInit = 0;

   /* Check for SiS30x first */
   temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
   if((temp == 1) || (temp == 2)) return;

   switch(HwInfo->jChipType) {
#ifdef SIS300
   case SIS_540:
   case SIS_630:
   case SIS_730:
      	temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
      	temp = (temp & 0x0E) >> 1;
      	if((temp >= 2) && (temp <= 5)) 	SiS_Pr->SiS_IF_DEF_LVDS = 1;
      	if(temp == 3)   		SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
      	if((temp == 4) || (temp == 5)) {
		/* Save power status (and error check) - UNUSED */
		SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
		SiS_Pr->SiS_IF_DEF_CH70xx = 1;
        }
	break;
#endif
#ifdef SIS315H
   case SIS_550:
   case SIS_650:
   case SIS_740:
   case SIS_330:
        temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
      	temp = (temp & 0x0E) >> 1;
      	if((temp >= 2) && (temp <= 3)) 	SiS_Pr->SiS_IF_DEF_LVDS = 1;
      	if(temp == 3)  			SiS_Pr->SiS_IF_DEF_CH70xx = 2;
        break;
   case SIS_661:
   case SIS_741:
   case SIS_660:
   case SIS_760:
        temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
      	temp = (temp & 0xe0) >> 5;
      	if((temp >= 2) && (temp <= 3)) 	SiS_Pr->SiS_IF_DEF_LVDS = 1;
      	if(temp == 3)  			SiS_Pr->SiS_IF_DEF_CH70xx = 2;
	if(temp == 4)  			SiS_Pr->SiS_IF_DEF_CONEX = 1;  /* Not yet supported */
        break;
#endif
   default:
        break;
   }
}

/*********************************************/
/*          HELPER: Enable DSTN/FSTN         */
/*********************************************/

void
SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable)
{
   SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
}

void
SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable)
{
   SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
}

/*********************************************/
/*        HELPER: Determine ROM usage        */
/*********************************************/

BOOLEAN
SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
{
   UCHAR  *ROMAddr  = HwInfo->pjVirtualRomBase;
   USHORT romversoffs, romvmaj = 1, romvmin = 0;

   if(HwInfo->jChipType >= SIS_661) {
      if((ROMAddr[0x1a] == 'N') &&
         (ROMAddr[0x1b] == 'e') &&
         (ROMAddr[0x1c] == 'w') &&
         (ROMAddr[0x1d] == 'V')) {
	 return TRUE;
      }
      romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
      if(romversoffs) {
	 if((ROMAddr[romversoffs+1] == '.') || (ROMAddr[romversoffs+4] == '.')) {
	    romvmaj = ROMAddr[romversoffs] - '0';
	    romvmin = ((ROMAddr[romversoffs+2] -'0') * 10) + (ROMAddr[romversoffs+3] - '0');
	 }
      }
      if((romvmaj != 0) || (romvmin >= 92)) {
	 return TRUE;
      }
   } else if(IS_SIS650740) {
      if((ROMAddr[0x1a] == 'N') &&