📄 shpchp_ctrl.c
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/* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); /* Done with exclusive hardware access */ up(&ctrl->crit_sect); break; case BLINKINGON_STATE: /* Wait for exclusive access to hardware */ down(&ctrl->crit_sect); p_slot->hpc_ops->green_led_off(p_slot); /* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); p_slot->hpc_ops->set_attention_status(p_slot, 0); /* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); /* Done with exclusive hardware access */ up(&ctrl->crit_sect); break; default: warn("Not a valid state\n"); return; } info(msg_button_cancel, p_slot->number); p_slot->state = STATIC_STATE; } else if (ctrl->event_queue[loop].event_type == INT_BUTTON_PRESS) { /* Button Pressed (No action on 1st press...) */ dbg("%s: Button pressed\n", __FUNCTION__); p_slot->hpc_ops->get_power_status(p_slot, &getstatus); if (getstatus) { /* slot is on */ dbg("%s: slot is on\n", __FUNCTION__); p_slot->state = BLINKINGOFF_STATE; info(msg_button_off, p_slot->number); } else { /* slot is off */ dbg("%s: slot is off\n", __FUNCTION__); p_slot->state = BLINKINGON_STATE; info(msg_button_on, p_slot->number); } /* Wait for exclusive access to hardware */ down(&ctrl->crit_sect); /* blink green LED and turn off amber */ p_slot->hpc_ops->green_led_blink(p_slot); /* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); p_slot->hpc_ops->set_attention_status(p_slot, 0); /* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); /* Done with exclusive hardware access */ up(&ctrl->crit_sect); init_timer(&p_slot->task_event); p_slot->task_event.expires = jiffies + 5 * HZ; /* 5 second delay */ p_slot->task_event.function = (void (*)(unsigned long)) pushbutton_helper_thread; p_slot->task_event.data = (unsigned long) p_slot; dbg("%s: add_timer p_slot = %p\n", __FUNCTION__,(void *) p_slot); add_timer(&p_slot->task_event); } else if (ctrl->event_queue[loop].event_type == INT_POWER_FAULT) { /***********POWER FAULT********************/ dbg("%s: power fault\n", __FUNCTION__); /* Wait for exclusive access to hardware */ down(&ctrl->crit_sect); p_slot->hpc_ops->set_attention_status(p_slot, 1); /* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); p_slot->hpc_ops->green_led_off(p_slot); /* Wait for the command to complete */ wait_for_ctrl_irq (ctrl); /* Done with exclusive hardware access */ up(&ctrl->crit_sect); } else { /* refresh notification */ if (p_slot) update_slot_info(p_slot); } ctrl->event_queue[loop].event_type = 0; change = 1; } } /* End of FOR loop */ } return;}int shpchp_enable_slot (struct slot *p_slot){ u8 getstatus = 0; int rc; struct pci_func *func; func = shpchp_slot_find(p_slot->bus, p_slot->device, 0); if (!func) { dbg("%s: Error! slot NULL\n", __FUNCTION__); return 1; } /* Check to see if (latch closed, card present, power off) */ down(&p_slot->ctrl->crit_sect); rc = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); if (rc || !getstatus) { info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number); up(&p_slot->ctrl->crit_sect); return 1; } rc = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); if (rc || getstatus) { info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number); up(&p_slot->ctrl->crit_sect); return 1; } rc = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); if (rc || getstatus) { info("%s: already enabled on slot(%x)\n", __FUNCTION__, p_slot->number); up(&p_slot->ctrl->crit_sect); return 1; } up(&p_slot->ctrl->crit_sect); slot_remove(func); func = shpchp_slot_create(p_slot->bus); if (func == NULL) return 1; func->bus = p_slot->bus; func->device = p_slot->device; func->function = 0; func->configured = 0; func->is_a_board = 1; /* We have to save the presence info for these slots */ p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); p_slot->hpc_ops->get_power_status(p_slot, &(func->pwr_save)); dbg("%s: func->pwr_save %x\n", __FUNCTION__, func->pwr_save); p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); func->switch_save = !getstatus? 0x10:0; rc = board_added(func, p_slot->ctrl); if (rc) { if (is_bridge(func)) bridge_slot_remove(func); else slot_remove(func); /* Setup slot structure with entry for empty slot */ func = shpchp_slot_create(p_slot->bus); if (func == NULL) return (1); /* Out of memory */ func->bus = p_slot->bus; func->device = p_slot->device; func->function = 0; func->configured = 0; func->is_a_board = 1; /* We have to save the presence info for these slots */ p_slot->hpc_ops->get_adapter_status(p_slot, &(func->presence_save)); p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); func->switch_save = !getstatus? 0x10:0; } if (p_slot) update_slot_info(p_slot); return rc;}int shpchp_disable_slot (struct slot *p_slot){ u8 class_code, header_type, BCR; u8 index = 0; u8 getstatus = 0; u32 rc = 0; int ret = 0; unsigned int devfn; struct pci_bus *pci_bus = p_slot->ctrl->pci_dev->subordinate; struct pci_func *func; if (!p_slot->ctrl) return 1; /* Check to see if (latch closed, card present, power on) */ down(&p_slot->ctrl->crit_sect); ret = p_slot->hpc_ops->get_adapter_status(p_slot, &getstatus); if (ret || !getstatus) { info("%s: no adapter on slot(%x)\n", __FUNCTION__, p_slot->number); up(&p_slot->ctrl->crit_sect); return 1; } ret = p_slot->hpc_ops->get_latch_status(p_slot, &getstatus); if (ret || getstatus) { info("%s: latch open on slot(%x)\n", __FUNCTION__, p_slot->number); up(&p_slot->ctrl->crit_sect); return 1; } ret = p_slot->hpc_ops->get_power_status(p_slot, &getstatus); if (ret || !getstatus) { info("%s: already disabled slot(%x)\n", __FUNCTION__, p_slot->number); up(&p_slot->ctrl->crit_sect); return 1; } up(&p_slot->ctrl->crit_sect); func = shpchp_slot_find(p_slot->bus, p_slot->device, index++); /* Make sure there are no video controllers here * for all func of p_slot */ while (func && !rc) { pci_bus->number = func->bus; devfn = PCI_DEVFN(func->device, func->function); /* Check the Class Code */ rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code); if (rc) return rc; if (class_code == PCI_BASE_CLASS_DISPLAY) { /* Display/Video adapter (not supported) */ rc = REMOVE_NOT_SUPPORTED; } else { /* See if it's a bridge */ rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); if (rc) return rc; /* If it's a bridge, check the VGA Enable bit */ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR); if (rc) return rc; /* If the VGA Enable bit is set, remove isn't supported */ if (BCR & PCI_BRIDGE_CTL_VGA) { rc = REMOVE_NOT_SUPPORTED; } } } func = shpchp_slot_find(p_slot->bus, p_slot->device, index++); } func = shpchp_slot_find(p_slot->bus, p_slot->device, 0); if ((func != NULL) && !rc) { rc = remove_board(func, p_slot->ctrl); } else if (!rc) rc = 1; if (p_slot) update_slot_info(p_slot); return(rc);}/** * configure_new_device - Configures the PCI header information of one board. * * @ctrl: pointer to controller structure * @func: pointer to function structure * @behind_bridge: 1 if this is a recursive call, 0 if not * @resources: pointer to set of resource lists * * Returns 0 if success * */static u32 configure_new_device (struct controller * ctrl, struct pci_func * func, u8 behind_bridge, struct resource_lists * resources, u8 bridge_bus, u8 bridge_dev){ u8 temp_byte, function, max_functions, stop_it; int rc; u32 ID; struct pci_func *new_slot; struct pci_bus lpci_bus, *pci_bus; int index; new_slot = func; dbg("%s\n", __FUNCTION__); memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus)); pci_bus = &lpci_bus; pci_bus->number = func->bus; /* Check for Multi-function device */ rc = pci_bus_read_config_byte(pci_bus, PCI_DEVFN(func->device, func->function), 0x0E, &temp_byte); if (rc) { dbg("%s: rc = %d\n", __FUNCTION__, rc); return rc; } if (temp_byte & 0x80) /* Multi-function device */ max_functions = 8; else max_functions = 1; function = 0; do { rc = configure_new_function(ctrl, new_slot, behind_bridge, resources, bridge_bus, bridge_dev); if (rc) { dbg("configure_new_function failed %d\n",rc); index = 0; while (new_slot) { new_slot = shpchp_slot_find(new_slot->bus, new_slot->device, index++); if (new_slot) shpchp_return_board_resources(new_slot, resources); } return(rc); } function++; stop_it = 0; /* The following loop skips to the next present function * and creates a board structure */ while ((function < max_functions) && (!stop_it)) { pci_bus_read_config_dword(pci_bus, PCI_DEVFN(func->device, function), 0x00, &ID); if (ID == 0xFFFFFFFF) { /* There's nothing there. */ function++; } else { /* There's something there */ /* Setup slot structure. */ new_slot = shpchp_slot_create(func->bus); if (new_slot == NULL) { /* Out of memory */ return(1); } new_slot->bus = func->bus; new_slot->device = func->device; new_slot->function = function; new_slot->is_a_board = 1; new_slot->status = 0; stop_it++; } } } while (function < max_functions); dbg("returning from configure_new_device\n"); return 0;}/* * Configuration logic that involves the hotplug data structures and * their bookkeeping *//** * configure_new_function - Configures the PCI header information of one device * * @ctrl: pointer to controller structure * @func: pointer to function structure * @behind_bridge: 1 if this is a recursive call, 0 if not * @resources: pointer to set of resource lists * * Calls itself recursively for bridged devices. * Returns 0 if success * */static int configure_new_function (struct controller * ctrl, struct pci_func * func, u8 behind_bridge, struct resource_lists *resources, u8 bridge_bus, u8 bridge_dev){ int cloop; u8 temp_byte; u8 device; u8 class_code; u16 temp_word; u32 rc; u32 temp_register; u32 base; u32 ID; unsigned int devfn; struct pci_resource *mem_node; struct pci_resource *p_mem_node; struct pci_resource *io_node; struct pci_resource *bus_node; struct pci_resource *hold_mem_node; struct pci_resource *hold_p_mem_node; struct pci_resource *hold_IO_node; struct pci_resource *hold_bus_node; struct irq_mapping irqs; struct pci_func *new_slot; struct pci_bus lpci_bus, *pci_bus; struct resource_lists temp_resources;#if defined(CONFIG_X86_64) u8 IRQ=0;#endif memcpy(&lpci_bus, ctrl->pci_dev->subordinate, sizeof(lpci_bus)); pci_bus = &lpci_bus; pci_bus->number = func->bus; devfn = PCI_DEVFN(func->device, func->function); /* Check for Bridge */ rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte); if (rc) return rc; if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { /* PCI-PCI Bridge */ /* set Primary bus */ dbg("set Primary bus = 0x%x\n", func->bus); rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus); if (rc) return rc; /* find range of busses to use */ bus_node = get_max_resource(&resources->bus_head, 1L); /* If we don't have any busses to allocate, we can't continue */ if (!bus_node) { err("Got NO bus resource to use\n"); return -ENOMEM; } dbg("Got ranges of buses to use: base:len=0x%x:%x\n", bus_node->base, bus_node->length); /* set Secondary bus */ temp_byte = (u8)bus_node->base; dbg("set Secondary bus = 0x%x\n", temp_byte); rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte); if (rc) return rc; /* set subordinate bus */ temp_byte = (u8)(bus_node->base + bus_node->length - 1); dbg("set subordinate bus = 0x%x\n", temp_byte); rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte); if (rc) return rc; /* Set HP parameters (Cache Line Size, Latency Timer) */ rc = shpchprm_set_hpp(ctrl, func, PCI_HEADER_TYPE_BRIDGE); if (rc) return rc; /* Setup the IO, memory, and prefetchable windows */ io_node = get_max_resource(&(resources->io_head), 0x1000L); if (io_node) { dbg("io_node(base, len, next) (%x, %x, %p)\n", io_node->base, io_node->length, io_node->next); } mem_node = get_max_resource(&(resources->mem_head), 0x100000L); if (mem_node) { dbg("mem_node(base, len, next) (%x, %x, %p)\n", mem_node->base, mem_node->length, mem_node->next); } if (resources->p_mem_head) p_mem_node = get_max_resource(&(resources->p_mem_head), 0x100000L); else { /* * In some platform implementation, MEM and PMEM are not * distinguished, and hence ACPI _CRS has only MEM entries * for both MEM and PMEM. */ dbg("using MEM for PMEM\n"); p_mem_node = get_max_resource(&(resources->mem_head), 0x100000L); } if (p_mem_node) { dbg("p_mem_node(
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