mt312.c

优龙2410linux2.6.8内核源代码

		if ((ret = mt312_readreg(i2c, VIT_MODE, &vit_mode)) < 0)
			return ret;
		vit_mode ^= 0x40;
		if ((ret = mt312_writereg(i2c, VIT_MODE, vit_mode)) < 0)
                	return ret;
		if ((ret = mt312_writereg(i2c, GO, 0x01)) < 0)
                	return ret;
	}

	return 0;
}

static int mt312_read_bercnt(struct dvb_i2c_bus *i2c, u32 * ber)
{
	int ret;
	u8 buf[3];

	if ((ret = mt312_read(i2c, RS_BERCNT_H, buf, 3)) < 0)
		return ret;

	*ber = ((buf[0] << 16) | (buf[1] << 8) | buf[2]) * 64;

	return 0;
}

static int mt312_read_agc(struct dvb_i2c_bus *i2c, u16 * signal_strength)
{
	int ret;
	u8 buf[3];
	u16 agc;
	s16 err_db;

	if ((ret = mt312_read(i2c, AGC_H, buf, sizeof(buf))) < 0)
		return ret;

	agc = (buf[0] << 6) | (buf[1] >> 2);
	err_db = (s16) (((buf[1] & 0x03) << 14) | buf[2] << 6) >> 6;

	*signal_strength = agc;

	dprintk(KERN_DEBUG "agc=%08x err_db=%hd\n", agc, err_db);

	return 0;
}

static int mt312_read_snr(struct dvb_i2c_bus *i2c, u16 * snr)
{
	int ret;
	u8 buf[2];

	if ((ret = mt312_read(i2c, M_SNR_H, &buf, sizeof(buf))) < 0)
		return ret;

	*snr = 0xFFFF - ((((buf[0] & 0x7f) << 8) | buf[1]) << 1);

	return 0;
}

static int mt312_read_ubc(struct dvb_i2c_bus *i2c, u32 * ubc)
{
	int ret;
	u8 buf[2];

	if ((ret = mt312_read(i2c, RS_UBC_H, &buf, sizeof(buf))) < 0)
		return ret;

	*ubc = (buf[0] << 8) | buf[1];

	return 0;
}

static int mt312_set_frontend(struct dvb_i2c_bus *i2c,
			      const struct dvb_frontend_parameters *p,
			      const long id)
{
	int ret;
	u8 buf[5], config_val;
	u16 sr;

	const u8 fec_tab[10] =
	    { 0x00, 0x01, 0x02, 0x04, 0x3f, 0x08, 0x10, 0x20, 0x3f, 0x3f };
	const u8 inv_tab[3] = { 0x00, 0x40, 0x80 };

	int (*set_tv_freq)(struct dvb_i2c_bus *i2c, u32 freq, u32 sr);

	dprintk("%s: Freq %d\n", __FUNCTION__, p->frequency);

	if ((p->frequency < mt312_info.frequency_min)
	    || (p->frequency > mt312_info.frequency_max))
		return -EINVAL;

	if ((p->inversion < INVERSION_OFF)
	    || (p->inversion > INVERSION_AUTO))
		return -EINVAL;

	if ((p->u.qpsk.symbol_rate < mt312_info.symbol_rate_min)
	    || (p->u.qpsk.symbol_rate > mt312_info.symbol_rate_max))
		return -EINVAL;

	if ((p->u.qpsk.fec_inner < FEC_NONE)
	    || (p->u.qpsk.fec_inner > FEC_AUTO))
		return -EINVAL;

	if ((p->u.qpsk.fec_inner == FEC_4_5)
	    || (p->u.qpsk.fec_inner == FEC_8_9))
		return -EINVAL;

	switch (id) {
	case ID_VP310:
	// For now we will do this only for the VP310.
	// It should be better for the mt312 as well, but tunning will be slower. ACCJr 09/29/03
		if ((ret = mt312_readreg(i2c, CONFIG, &config_val) < 0))
			return ret;
		if (p->u.qpsk.symbol_rate >= 30000000) //Note that 30MS/s should use 90MHz
		{
			if ((config_val & 0x0c) == 0x08) //We are running 60MHz
				if ((ret = mt312_init(i2c, id, (u8) 90)) < 0)
					return ret;
		}
		else
		{
			if ((config_val & 0x0c) == 0x0C) //We are running 90MHz
				if ((ret = mt312_init(i2c, id, (u8) 60)) < 0)
					return ret;
		}
		set_tv_freq = tsa5059_set_tv_freq;
		break;
	case ID_MT312:
		set_tv_freq = sl1935_set_tv_freq;
		break;
	default:
		return -EINVAL;
	}

	if ((ret = set_tv_freq(i2c, p->frequency, p->u.qpsk.symbol_rate)) < 0)
		return ret;

	/* sr = (u16)(sr * 256.0 / 1000000.0) */
	sr = mt312_div(p->u.qpsk.symbol_rate * 4, 15625);

	/* SYM_RATE */
	buf[0] = (sr >> 8) & 0x3f;
	buf[1] = (sr >> 0) & 0xff;

	/* VIT_MODE */
	buf[2] = inv_tab[p->inversion] | fec_tab[p->u.qpsk.fec_inner];

	/* QPSK_CTRL */
	buf[3] = 0x40;		/* swap I and Q before QPSK demodulation */

	if (p->u.qpsk.symbol_rate < 10000000)
		buf[3] |= 0x04;	/* use afc mode */

	/* GO */
	buf[4] = 0x01;

	if ((ret = mt312_write(i2c, SYM_RATE_H, buf, sizeof(buf))) < 0)
		return ret;

        mt312_reset(i2c, 0);

	return 0;
}

static int mt312_get_inversion(struct dvb_i2c_bus *i2c,
			       fe_spectral_inversion_t * i)
{
	int ret;
	u8 vit_mode;

	if ((ret = mt312_readreg(i2c, VIT_MODE, &vit_mode)) < 0)
		return ret;

	if (vit_mode & 0x80)	/* auto inversion was used */
		*i = (vit_mode & 0x40) ? INVERSION_ON : INVERSION_OFF;

	return 0;
}

static int mt312_get_symbol_rate(struct dvb_i2c_bus *i2c, u32 * sr)
{
	int ret;
	u8 sym_rate_h;
	u8 dec_ratio;
	u16 sym_rat_op;
	u16 monitor;
	u8 buf[2];

	if ((ret = mt312_readreg(i2c, SYM_RATE_H, &sym_rate_h)) < 0)
		return ret;

	if (sym_rate_h & 0x80) {	/* symbol rate search was used */
		if ((ret = mt312_writereg(i2c, MON_CTRL, 0x03)) < 0)
			return ret;

		if ((ret = mt312_read(i2c, MONITOR_H, buf, sizeof(buf))) < 0)
			return ret;

		monitor = (buf[0] << 8) | buf[1];

		dprintk(KERN_DEBUG "sr(auto) = %u\n",
		       mt312_div(monitor * 15625, 4));
	} else {
		if ((ret = mt312_writereg(i2c, MON_CTRL, 0x05)) < 0)
			return ret;

		if ((ret = mt312_read(i2c, MONITOR_H, buf, sizeof(buf))) < 0)
			return ret;

		dec_ratio = ((buf[0] >> 5) & 0x07) * 32;

		if ((ret = mt312_read(i2c, SYM_RAT_OP_H, buf, sizeof(buf))) < 0)
			return ret;

		sym_rat_op = (buf[0] << 8) | buf[1];

		dprintk(KERN_DEBUG "sym_rat_op=%d dec_ratio=%d\n",
		       sym_rat_op, dec_ratio);
		dprintk(KERN_DEBUG "*sr(manual) = %lu\n",
		       (((MT312_PLL_CLK * 8192) / (sym_rat_op + 8192)) *
			2) - dec_ratio);
	}

	return 0;
}

static int mt312_get_code_rate(struct dvb_i2c_bus *i2c, fe_code_rate_t * cr)
{
	const fe_code_rate_t fec_tab[8] =
	    { FEC_1_2, FEC_2_3, FEC_3_4, FEC_5_6, FEC_6_7, FEC_7_8,
		FEC_AUTO, FEC_AUTO };

	int ret;
	u8 fec_status;

	if ((ret = mt312_readreg(i2c, FEC_STATUS, &fec_status)) < 0)
		return ret;

	*cr = fec_tab[(fec_status >> 4) & 0x07];

	return 0;
}

static int mt312_get_frontend(struct dvb_i2c_bus *i2c,
			      struct dvb_frontend_parameters *p)
{
	int ret;

	if ((ret = mt312_get_inversion(i2c, &p->inversion)) < 0)
		return ret;

	if ((ret = mt312_get_symbol_rate(i2c, &p->u.qpsk.symbol_rate)) < 0)
		return ret;

	if ((ret = mt312_get_code_rate(i2c, &p->u.qpsk.fec_inner)) < 0)
		return ret;

	return 0;
}

static int mt312_sleep(struct dvb_i2c_bus *i2c)
{
	int ret;
	u8 config;

	/* reset all registers to defaults */
	if ((ret = mt312_reset(i2c, 1)) < 0)
		return ret;

	if ((ret = mt312_readreg(i2c, CONFIG, &config)) < 0)
		return ret;

	/* enter standby */
	if ((ret = mt312_writereg(i2c, CONFIG, config & 0x7f)) < 0)
		return ret;

	return 0;
}

static int mt312_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
{
	struct dvb_i2c_bus *i2c = fe->i2c;

	switch (cmd) {
	case FE_GET_INFO:
		memcpy(arg, &mt312_info, sizeof(struct dvb_frontend_info));
		break;

	case FE_DISEQC_RESET_OVERLOAD:
		return -EOPNOTSUPP;

	case FE_DISEQC_SEND_MASTER_CMD:
		return mt312_send_master_cmd(i2c, arg);

	case FE_DISEQC_RECV_SLAVE_REPLY:
		if ((long) fe->data == ID_MT312)
			return mt312_recv_slave_reply(i2c, arg);
		else
			return -EOPNOTSUPP;

	case FE_DISEQC_SEND_BURST:
		return mt312_send_burst(i2c, (fe_sec_mini_cmd_t) arg);

	case FE_SET_TONE:
		return mt312_set_tone(i2c, (fe_sec_tone_mode_t) arg);

	case FE_SET_VOLTAGE:
		return mt312_set_voltage(i2c, (fe_sec_voltage_t) arg);

	case FE_ENABLE_HIGH_LNB_VOLTAGE:
		return -EOPNOTSUPP;

	case FE_READ_STATUS:
		return mt312_read_status(i2c, arg, (long) fe->data);

	case FE_READ_BER:
		return mt312_read_bercnt(i2c, arg);

	case FE_READ_SIGNAL_STRENGTH:
		return mt312_read_agc(i2c, arg);

	case FE_READ_SNR:
		return mt312_read_snr(i2c, arg);

	case FE_READ_UNCORRECTED_BLOCKS:
		return mt312_read_ubc(i2c, arg);

	case FE_SET_FRONTEND:
		return mt312_set_frontend(i2c, arg, (long) fe->data);

	case FE_GET_FRONTEND:
		return mt312_get_frontend(i2c, arg);

	case FE_GET_EVENT:
		return -EOPNOTSUPP;

	case FE_SLEEP:
		return mt312_sleep(i2c);

	case FE_INIT:
	//For the VP310 we should run at 60MHz when ever possible.
	//It should be better to run the mt312 ar lower speed when ever possible, but tunning will be slower. ACCJr 09/29/03
		if ((long)fe->data == ID_MT312)
			return mt312_init(i2c, (long) fe->data, (u8) 90);
		else
			return mt312_init(i2c, (long) fe->data, (u8) 60);

	case FE_GET_TUNE_SETTINGS:
	{
	        struct dvb_frontend_tune_settings* fesettings = (struct dvb_frontend_tune_settings*) arg;
	        fesettings->min_delay_ms = 50;
	        fesettings->step_size = 0;
	        fesettings->max_drift = 0;
	        return 0;
	}	    

	default:
		return -ENOIOCTLCMD;
	}

	return 0;
}

static int mt312_attach(struct dvb_i2c_bus *i2c, void **data)
{
	int ret;
	u8 id;

	if ((ret = mt312_readreg(i2c, ID, &id)) < 0)
		return ret;

	if ((id != ID_VP310) && (id != ID_MT312))
		return -ENODEV;

	if ((ret = dvb_register_frontend(mt312_ioctl, i2c,
				(void *)(long)id, &mt312_info)) < 0)
		return ret;

	mt312_count++;

	return 0;
}

static void mt312_detach(struct dvb_i2c_bus *i2c, void *data)
{
	dvb_unregister_frontend(mt312_ioctl, i2c);

	if (mt312_count)
		mt312_count--;
}

static int __init mt312_module_init(void)
{
	return dvb_register_i2c_device(THIS_MODULE, mt312_attach, mt312_detach);
}

static void __exit mt312_module_exit(void)
{
	dvb_unregister_i2c_device(mt312_attach);
}

module_init(mt312_module_init);
module_exit(mt312_module_exit);

#if MT312_DEBUG != 0
MODULE_PARM(debug,"i");
MODULE_PARM_DESC(debug, "enable verbose debug messages");
#endif

MODULE_DESCRIPTION("MT312 Satellite Channel Decoder Driver");
MODULE_AUTHOR("Andreas Oberritter <[e-mail]>");
MODULE_LICENSE("GPL");