s3c2410_nand.c

来自「优龙2410linux2.6.8内核源代码」· C语言 代码 · 共 318 行

/*
 * MTD NAND device driver for S3C2410 Development Board
 * based on smc.c
 * 
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 */

#include <linux/slab.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <asm/io.h>
#include <asm/sizes.h>
#include <asm/arch/regs-nand.h>

#ifdef CONFIG_PM
#include <linux/pm.h>
#endif

#ifdef CONFIG_PM
struct pm_dev *smc_pm_dev;
#endif

/*
 * MTD structure for S3C2410 Development Board
 */
static struct mtd_info *s3c2410_mtd = NULL;

#ifdef CONFIG_MTD_PARTITIONS

static struct mtd_partition partition_info[] = {
	{ name: 	"boot",
	  offset:	0,
	  size:		SZ_256K },
	{ name: 	"kernel",
	  offset:	SZ_256K,
	  size:		SZ_2M - SZ_256K },
	{ name:		"rootfs",
	  offset:	SZ_2M,
	  size:		30 * SZ_1M },
	{ name:		"ext-fs1",
	  offset:	SZ_32M,
	  size:		SZ_16M },
	{ name:		"ext-fs2",
	  offset:	SZ_32M + SZ_16M,
	  size:		SZ_16M },
};

#endif

static void smc_hwcontrol(struct mtd_info *mtd, int cmd) {
	struct nand_chip *my_nand = mtd->priv;
    switch (cmd) {
    case NAND_CTL_SETNCE:
	__raw_writel(__raw_readl(S3C2410_NFCONF)&~(1<<11), S3C2410_NFCONF);
	break;
    case NAND_CTL_CLRNCE:
	__raw_writel(__raw_readl(S3C2410_NFCONF)|(1<<11), S3C2410_NFCONF);
	break;
    case NAND_CTL_SETCLE:
	my_nand->IO_ADDR_W = S3C2410_NFCMD;
	break;
    case NAND_CTL_CLRCLE:
	my_nand->IO_ADDR_W = S3C2410_NFDATA;
	break;
    case NAND_CTL_SETALE:
	my_nand->IO_ADDR_W = S3C2410_NFADDR;
	break;
    case NAND_CTL_CLRALE:
	my_nand->IO_ADDR_W = S3C2410_NFDATA;
	break;
    }
}

static void smc_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
{
	register struct nand_chip *my_nand = mtd->priv;
	
	/*
	 * Write out the command to the device.
	 */
	if (command != NAND_CMD_SEQIN)
		__raw_writel(command, S3C2410_NFCMD);
	else {
		if (mtd->oobblock == 256 && column >= 256) {
			column -= 256;
			__raw_writel(NAND_CMD_RESET, S3C2410_NFCMD);
			__raw_writel(NAND_CMD_READOOB, S3C2410_NFCMD);
			__raw_writel(NAND_CMD_SEQIN, S3C2410_NFCMD);
		}
		else
			if (mtd->oobblock == 512 && column >= 256) {
				if (column < 512) {
					column -= 256;
					__raw_writel(NAND_CMD_READ1, S3C2410_NFCMD);	
					__raw_writel(NAND_CMD_SEQIN, S3C2410_NFCMD);
				} else {
					column -= 512;
					__raw_writel(NAND_CMD_READOOB, S3C2410_NFCMD);	
					__raw_writel(NAND_CMD_SEQIN, S3C2410_NFCMD);
				}
			} else {
				__raw_writel(NAND_CMD_READ0, S3C2410_NFCMD);	
				__raw_writel(NAND_CMD_SEQIN, S3C2410_NFCMD);
			}
	}
	
	/* Serially input address */
	if (column != -1)
		__raw_writel(column, S3C2410_NFADDR);
	if (page_addr != -1) {
		__raw_writel((unsigned char)(page_addr & 0xff), S3C2410_NFADDR);
		__raw_writel((unsigned char)((page_addr >> 8) & 0xff), S3C2410_NFADDR);
		/* One more address cycle for higher density devices */
		if (mtd->size & 0x0c000000) {
			__raw_writel((unsigned char)((page_addr >> 16) & 0x0f), S3C2410_NFADDR);
		}
	}

	/* wait until command is processed */
	while (!my_nand->dev_ready(mtd))
		;
}
/*
static u_char read_data(struct mtd_info *mtd) {
    return (u_char)__raw_readl(S3C2410_NFDATA);
}

static void write_data(struct mtd_info *mtd, u_char val) {
    __raw_writel((u_char)val, S3C2410_NFDATA);

}
*/
static int device_ready(struct mtd_info *mtd) {
	return __raw_readl(S3C2410_NFSTAT) & 1;
}

#ifdef CONFIG_PM
static unsigned long nfcon;
static int
s3c2410_smc_pm_callback(struct pm_dev *pm_dev, pm_request_t req, void *data)
{
	struct nand_chip *this = (struct nand_chip *)pm_dev->data;
	switch (req) {
		case PM_SUSPEND:
			nfcon = __raw_readl(S3C2410_NFCONF);
			break;
		case PM_RESUME:
			__raw_writel(nfcon, S3C2410_NFCONF);
			/* Chip Enable -> RESET -> Wait for Ready -> Chip Disable */
			this->hwcontrol(s3c2410_mtd, NAND_CTL_SETNCE);
			this->cmdfunc(s3c2410_mtd, NAND_CMD_RESET, -1, -1);
			while(!this->dev_ready(s3c2410_mtd));
			this->hwcontrol(s3c2410_mtd, NAND_CTL_CLRNCE);
			break;
	}
	return 0;
}
#endif

/*
 * Main initialization routine
 */
int __init smc_s3c2410_init (void)
{
    struct nand_chip *this;
    int err = 0;

    /* Allocate memory for MTD device structure and private data */
    s3c2410_mtd = kmalloc (sizeof(struct mtd_info) + sizeof (struct nand_chip),
			GFP_KERNEL);
    if (!s3c2410_mtd) {
      printk ("Unable to allocate S3C2410 NAND MTD device structure.\n");
      return -ENOMEM;
    }

    /* Get pointer to private data */
    this = (struct nand_chip *) (&s3c2410_mtd[1]);

    /* Initialize structures */
    memset((char *) s3c2410_mtd, 0, sizeof(struct mtd_info));
    memset((char *) this, 0, sizeof(struct nand_chip));

    /* Link the private data with the MTD structure */
    s3c2410_mtd->priv = this;
/*
    // set NAND Flash controller
    {
    	u_int16_t nfconf;

	nfconf = NFCONF;
	// NAND Flash controller enable 
	nfconf |= NFCONF_FCTRL_EN;

	// Set flash memory timing
	nfconf &= ~NFCONF_TWRPH1;   // 0x0 
	nfconf |= NFCONF_TWRPH0_3;  // 0x3 
	nfconf &= ~NFCONF_TACLS;    // 0x0 

	NFCONF = nfconf;
    }
*/
	__raw_writel((1<<15)|(1<11)|(1<<8)|(3<<4)|(1<<0), S3C2410_NFCONF);
    /* Set address of NAND IO lines */
	this->IO_ADDR_R  = S3C2410_NFDATA;
	this->IO_ADDR_W  = S3C2410_NFDATA;
	this->hwcontrol  = smc_hwcontrol;
	this->dev_ready  = device_ready;
	this->cmdfunc    = smc_command;
	this->chip_delay = 20;
	this->eccmode	 = NAND_ECC_NONE;
//	this->eccmode    = NAND_ECC_SOFT;
//	this->write_cmd  = write_cmd;
//	this->write_addr = write_addr;
//	this->read_byte  = read_data;
//	this->write_byte = write_data;

    /* Chip Enable -> RESET -> Wait for Ready -> Chip Disable */
    this->hwcontrol(s3c2410_mtd, NAND_CTL_SETNCE);
    this->cmdfunc(s3c2410_mtd, NAND_CMD_RESET, -1, -1);
    while(!this->dev_ready(s3c2410_mtd));
    this->hwcontrol(s3c2410_mtd, NAND_CTL_CLRNCE);

    /* Scan to find existance of the device */
    if (nand_scan (s3c2410_mtd, 1)) {
    	err = -ENXIO;
		goto out_mtd;
    }
    /* Allocate memory for internal data buffer */
    this->data_buf = kmalloc(sizeof(u_char) * 
			     (s3c2410_mtd->oobblock + s3c2410_mtd->oobsize), 
			     GFP_KERNEL);
    if (!this->data_buf) {
      printk ("Unable to allocate NAND data buffer for S3C2410.\n");
      err = -ENOMEM;
      goto out_mtd;
    }
#ifdef CONFIG_MTD_PARTITIONS
    switch(s3c2410_mtd->size) {	
	case SZ_16M:
		err = add_mtd_partitions(s3c2410_mtd, partition_info,
				ARRAY_SIZE (partition_info)-2 );
		break;
	case SZ_32M:
		err = add_mtd_partitions(s3c2410_mtd, partition_info,
				ARRAY_SIZE (partition_info)-1);
		break;
	case SZ_64M:
		err = add_mtd_partitions(s3c2410_mtd, partition_info,
				ARRAY_SIZE (partition_info));
		break;
	default:
		printk ("Unsupported SmartMedia device\n");
		err = -ENXIO;
		goto out_cac;
	}
#else
    add_mtd_device(s3c2410_mtd);
#endif

#ifdef CONFIG_PM
	smc_pm_dev = pm_register(PM_DEBUG_DEV, PM_SYS_MISC, s3c2410_smc_pm_callback);
	if (smc_pm_dev)
		smc_pm_dev->data = &s3c2410_mtd[1];
#endif
    goto out;

out_cac:
	kfree (this->data_buf);
out_mtd:
	kfree (s3c2410_mtd);
out:
	return err;
}
module_init(smc_s3c2410_init);

/*
 * Clean up routine
 */
#ifdef MODULE
static void __exit smc_s3c2410_cleanup (void)
{
    struct nand_chip *this = (struct nand_chip *) &s3c2410_mtd[1];

#if defined(CONFIG_MTD_SMC_S3C2410_SMDK_PARTITION) 
    del_mtd_partitions(s3c2410_mtd);
#else
    del_mtd_device(s3c2410_mtd);
#endif    
    kfree (this->data_buf);
    kfree (s3c2410_mtd);
}
module_exit(smc_s3c2410_cleanup);
#endif

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Yong-iL Joh <[e-mail]>");
MODULE_DESCRIPTION("SMC Card on S3C2410 board");

/*
 | $Id: smc_s3c2410.c,v 1.1.2.2 2002/05/30 08:14:44 cgjeong Exp $
 |
 | Local Variables:
 | mode: c
 | mode: font-lock
 | version-control: t
 | delete-old-versions: t
 | c-basic-offset: 2
 | tab-width: 8
 | End:
 |
 | -*- End-Of-File -*-
 */