perf_images.h

优龙2410linux2.6.8内核源代码

0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffaaaa,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffaaaa,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00030000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff },


/* mpb_labort
 *
 * ctr0: counts L_ABORT_ALU0L
 * ctr1: counts L_ABORT_ALU1L 
 * ctr2: counts MPB0H 
 * ctr3: counts MPB1H 
 */
{
0x0c00c000,00000000,0x00060000,00000000,
0xe0e0e0e0,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffa5ffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xff000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffff0000,00000000,0x6fffffff,0xffffffff,
0xfff7fff7,0xffffffff,0xffffffff,0xf0000000,
00000000,0x0003f800,0x007f000e,0x01001fc0,
0x03c08007,0xf000c030,0x01fc0034,0x10007f00,
0x0a05001f,0xc002c180,0x07f00080,0x7001fc00,
0x2420007f,0x00060900,0x1fc001c2,0x8007f000,
0x40b001fc,0x00143000,0x7f00020d,0x001fc000,
0xc38007f0,0x0000f001,0xfc0007ff,0xfffff800,
0xfffffffe,0x003fffff,0xff800fff,0xffffe003,
0xfffffff8,0x00ffffff,0xfe003fff,0xffff800f,
0xffffffe0,0x03ffffff,0xf800ffff,0xfffe003f,
0xffffff80,0x0fffffff,0xe003ffff,0xfff800ff,
0xfffffe00,0x3fffffff,0x800fffff,0xffe00000,
00000000,00000000,00000000,00000000,
0x605c0000,00000000,0x60000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xfffffc00,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffaaaa,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffaaaa,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00030000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff },

/* panic
 *
 * ctr0: is the overflow for counter 1 
 * ctr1: counts traps and RFI's 
 * ctr2: counts panic traps 
 * ctr3: is the overflow for counter 2
 */
{
0x0c002000,00000000,0x00060000,00000000,
0xe7efe0e0,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xfffffffc,
0x41380030,0x1aabfff2,0x17000000,00000000,
0x01b80000,0x3effffff,0xffffffff,0xffffffff,
0xffffffff,00000000,00000000,0x00400000,
0x00001fff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffff0000,00000000,0x1fffffff,0xffffffff,
0xfff7fff7,0xffffffff,0xffffffff,0xf0000000,
0xb0000000,0x00012c04,0x05790804,0x14013e44,
0x0008004f,0x90000040,0x15e46000,0xc0047920,
0x004a003e,0x40011080,0x0f900024,0x4003e460,
0x00c80479,0x00023301,0x1e400100,0x4157d080,
0x514053f4,0x40048014,0xfd000104,0x055f4600,
0x4c0147d2,0x0014a043,0xf4001508,0x10fd0003,
0x44043f46,0x004c8147,0xd0003330,0x51f40014,
0x04257908,0x0c14093e,0x44020802,0x4f900080,
0x4095e460,0x20c02479,0x20084a08,0x3e400310,
0x820f9000,0xa44083e4,0x6020c824,0x79000a33,
0x091e4003,0x3c007fff,0x800f001f,0xffe00000,
00000000,00000000,00000000,00000000,
0x10400000,00000000,0x10000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xfffffc00,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00030000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff },

/* rare_inst
 *
 * ctr0: counts sync and syncdma instructions 
 * ctr1: counts pxtlbx,x instructions 
 * ctr2: counts ixtlbt instructions 
 * ctr3: counts cycles 
 */
{
0x0c01e000,00000000,0x00060000,00000000,
0xe0e0e0e0,0x004e000c,0x000843fc,0x85c09380,
0x0121ebfd,0xff217124,0xe0004000,0x943fc85f,
0xffffffff,0xffffffff,0xff000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffff0000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xf0000000,
0xe00000e0,0x00003c00,0x007f0001,0x01001fc0,
0x00408007,0xf0003030,0x01fc000c,0x10007f00,
0x0505001f,0xc0014180,0x07f00070,0x7001fc00,
0x1c20007f,0x00090900,0x1fc00242,0x8007f000,
0xb0b001fc,0x002c3000,0x7f000d0d,0x001fc003,
0x438007f0,0x00f0f001,0xfc003fff,0xfffff800,
0xfffffffe,0x003fffff,0xff800fff,0xffffe003,
0xfffffff8,0x00ffffff,0xfe003fff,0xffff800f,
0xffffffe0,0x03ffffff,0xf800ffff,0xfffe003f,
0xffffff80,0x0fffffff,0xe003ffff,0xfff800ff,
0xfffffe00,0x3fffffff,0x800fffff,0xffe00000,
00000000,00000000,00000000,00000000,
0xffff0000,00000000,0xf0000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xfffffc00,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00030000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff },

/* rw_dfet (for D-cache misses and writebacks)
 *
 * ctr0: counts address valid cycles 
 * ctr1: counts *all* data valid cycles 
 * ctr2: is the overflow from counter 0 
 * ctr3: is the overflow from counter 1 
 */
{
0x0c01e000,00000000,0x00060000,00000000,
0xefefefef,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xff000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffff0000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xf0000000,
0x0000000c,0x00003c00,0x07930000,0x0041e4c0,
0x01002079,0x3000800c,0x1e4c0030,0x00279300,
0x010049e4,0xc0014022,0x79300090,0x0c9e4c00,
0x34004793,0x00020051,0xe4c00180,0x24793000,
0xa00d1e4c,0x00380067,0x93000300,0x59e4c001,
0xc0267930,0x00b00d9e,0x4c003fff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xfffffc00,
00000000,00000000,00000000,00000000,
0xffff0000,00000000,0xf0000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xfffffc00,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00100000,00000000,0xf0000000,00000000,
00000000,00000000,0x98000000,00000000,
0xffffffff,0xffffffff,0x0fffffff,0xffffffff,
00000000,00000000,0x00ffffff,0xffffffff,
0xffffffff,0xffffffff },

/* rw_ifet (I-cache misses -- actually dumb READ transactions)
 *
 * ctr0: counts address valid cycles 
 * ctr1: counts *all* data valid cycles 
 * ctr2: is the overflow from counter 0 
 * ctr3: is the overflow from counter 1 
 */
{
0x0c01e000,00000000,0x00060000,00000000,
0xefefefef,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xff000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffff0000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xf0000000,
0x0000000c,0x00003c00,0x07930000,0x0041e4c0,
0x01002079,0x3000800c,0x1e4c0030,0x00279300,
0x010049e4,0xc0014022,0x79300090,0x0c9e4c00,
0x34004793,0x00020051,0xe4c00180,0x24793000,
0xa00d1e4c,0x00380067,0x93000300,0x59e4c001,
0xc0267930,0x00b00d9e,0x4c003fff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xfffffc00,
00000000,00000000,00000000,00000000,
0xffff0000,00000000,0xf0000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xfffffc00,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00100000,00000000,0xd0000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0x00ffffff,0xffffffff,
0xffffffff,0xffffffff,00000000,00000000,
0xffffffff,0xffffffff },


/* rw_sdfet (READ_SHARED_OR_PRIVATE transactions)
 *
 * ctr0: counts address valid cycles
 * ctr1: counts *all* data valid cycles 
 * ctr2: is the overflow from counter 0 
 * ctr3: is the overflow from counter 1 
 */
{
0x0c01e000,00000000,0x00060000,00000000,
0xefefefef,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xff000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffff0000,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xf0000000,
0x0000000c,0x00003c00,0x07930000,0x0041e4c0,
0x01002079,0x3000800c,0x1e4c0030,0x00279300,
0x010049e4,0xc0014022,0x79300090,0x0c9e4c00,
0x34004793,0x00020051,0xe4c00180,0x24793000,
0xa00d1e4c,0x00380067,0x93000300,0x59e4c001,
0xc0267930,0x00b00d9e,0x4c003fff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xffffffff,0xfffffc00,
00000000,00000000,00000000,00000000,
0xffff0000,00000000,0xf0000000,00000000,
0xffffffff,0xffffffff,0xffffffff,0xffffffff,
0xfffffc00,00000000,0xffffffff,0xffffffff,
0xffffffff,0xffffffff,0xfffffc00,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xffffffff,0xf3ffffff,0xffffffff,
0xfdffffff,0xffffffff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0xffffffff,0xfffff9ff,0xfe000000,00000000,
0x00100000,00000000,0xf4000000,00000000,
00000000,00000000,00000000,00000000,
0xffffffff,0xffffffff,0x00ffffff,0xffffffff,
00000000,00000000,00000000,00000000,
0xffffffff,0xffffffff },


/* spec_ifet
 *
 * ICORE_AV fires for every request which the Instruction Fetch Unit sends
 * to the Runway Interface Block.  Hence, this counts all I-misses, speculative
 * or not, but does *not* include I-cache prefetches, which are generated by
 * RIB.
 * IRTN_AV fires twice for every I-cache miss returning from RIB to the IFU.
 * It will not fire if a second I-cache miss is issued from the IFU to RIB
 * before the first returns.  Therefore, if the IRTN_AV count is much less
 * than 2x the ICORE_AV count, many speculative I-cache misses are occurring
 * which are "discovered" to be incorrect fairly quickly.
 * The ratio of I-cache miss transactions on Runway to the ICORE_AV count is
 * a measure of the effectiveness of instruction prefetching.  This ratio
 * should be between 1 and 2.  If it is close to 1, most prefetches are
 * eventually called for by the IFU; if it is close to 2, almost no prefetches
 * are useful and they are wasted bus traffic.
 *
 * ctr0: counts ICORE_AV 
 * ctr1: counts IRTN_AV 
 * ctr2: counts all non-coherent READ transactions on Runway. (TTYPE D0) 
 *	This should be just I-cache miss and I-prefetch transactions.
 * ctr3: count