ads7846.fnsim.qmsg

四线电阻式触摸屏

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version " "Info: Version 7.2 Build 207 03/18/2008 Service Pack 3 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Mar 15 14:09:07 2009 " "Info: Processing started: Sun Mar 15 14:09:07 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ads7846 -c ads7846 --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ads7846 -c ads7846 --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ads7846.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ads7846.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ads7846-behavioral " "Info: Found design unit 1: ads7846-behavioral" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 ADS7846 " "Info: Found entity 1: ADS7846" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "ads7846 " "Info: Elaborating entity \"ads7846\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "dataoutx ads7846.vhd(53) " "Warning (10492): VHDL Process Statement warning at ads7846.vhd(53): signal \"dataoutx\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 53 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "dataouty ads7846.vhd(54) " "Warning (10492): VHDL Process Statement warning at ads7846.vhd(54): signal \"dataouty\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 54 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Warning" "WVRFX_L2_VDB_DRIVERLESS_OUTPUT_PORT" "a ads7846.vhd(8) " "Warning (10034): Output port \"a\" at ads7846.vhd(8) has no driver" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 8 0 0 } }  } 0 10034 "Output port \"%1!s!\" at %2!s! has no driver" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "write_control\[0\] data_in GND " "Warning (14130): Reduced register \"write_control\[0\]\" with stuck data_in port to stuck value GND" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 23 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "write_control\[1\] data_in GND " "Warning (14130): Reduced register \"write_control\[1\]\" with stuck data_in port to stuck value GND" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 23 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "write_control\[2\] data_in GND " "Warning (14130): Reduced register \"write_control\[2\]\" with stuck data_in port to stuck value GND" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 23 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "write_control\[3\] data_in GND " "Warning (14130): Reduced register \"write_control\[3\]\" with stuck data_in port to stuck value GND" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 23 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "write_control\[5\] data_in GND " "Warning (14130): Reduced register \"write_control\[5\]\" with stuck data_in port to stuck value GND" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 23 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0}
{ "Info" "ILPMS_INFERENCING_SUMMARY" "4 " "Info: Inferred 4 megafunctions from design logic" { { "Info" "ILPMS_LPM_MUX_INFERRED" "Mux0 lpm_mux " "Info: Inferred mux megafunction (\"lpm_mux\") from the following logic: \"Mux0\"" {  } { { "ads7846.vhd" "Mux0" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 33 -1 0 } }  } 0 0 "Inferred mux megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_ADD_SUB_INFERRED" "Add0 lpm_add_sub " "Info: Inferred adder/subtractor megafunction (\"lpm_add_sub\") from the following logic: \"Add0\"" {  } { { "ads7846.vhd" "Add0" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 36 -1 0 } }  } 0 0 "Inferred adder/subtractor megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_ADD_SUB_INFERRED" "Add1 lpm_add_sub " "Info: Inferred adder/subtractor megafunction (\"lpm_add_sub\") from the following logic: \"Add1\"" {  } { { "ads7846.vhd" "Add1" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 42 -1 0 } }  } 0 0 "Inferred adder/subtractor megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0} { "Info" "ILPMS_LPM_ADD_SUB_INFERRED" "Add2 lpm_add_sub " "Info: Inferred adder/subtractor megafunction (\"lpm_add_sub\") from the following logic: \"Add2\"" {  } { { "ads7846.vhd" "Add2" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 43 -1 0 } }  } 0 0 "Inferred adder/subtractor megafunction (\"%2!s!\") from the following logic: \"%1!s!\"" 0 0 "" 0}  } {  } 0 0 "Inferred %1!llu! megafunctions from design logic" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../libraries/megafunctions/lpm_mux.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../libraries/megafunctions/lpm_mux.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_mux " "Info: Found entity 1: lpm_mux" {  } { { "lpm_mux.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_mux.tdf" 74 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_ELABORATION_HEADER" "lpm_mux:Mux0 " "Info: Elaborated megafunction instantiation \"lpm_mux:Mux0\"" {  } { { "ads7846.vhd" "" { Text "D:/Altera/72/quartus/ads7846/ads7846.vhd" 33 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_s9c.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_s9c.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_s9c " "Info: Found entity 1: mux_s9c" {  } { { "db/mux_s9c.tdf" "" { Text "D:/Altera/72/quartus/ads7846/db/mux_s9c.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../libraries/megafunctions/lpm_add_sub.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ../libraries/megafunctions/lpm_add_sub.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_add_sub " "Info: Found entity 1: lpm_add_sub" {  } { { "lpm_add_sub.tdf" "" { Text "d:/altera/72/quartus/libraries/megafunctions/lpm_add_sub.tdf" 102 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0}