pwm.c

STM32F10xx的LCD驱动源码

#include   "PWM.h" 
//#include "stm32f10x_lib.h"


/* TIM2 configuration: PWM Input mode ------------------------
     The external signal is connected to TIM2 CH2 pin (PA.01), 
     The Falling edge is used as active edge,
     The TIM2 CCR2 is used to compute the frequency value 
     The TIM2 CCR1 is used to compute the duty cycle value
  ------------------------------------------------------------ */
void PWMI_Init(void)
{
   TIM2->CCR1    &=0x0000;
   TIM2->CCR2    &=0x0000;
   TIM2->ARR     &=0x0000;
   TIM2->CCMR1   &=0x0000;
   TIM2->DIER    &=0x0000;
   TIM2->CCER    &=0x0000;
   TIM2->CR1     &=0x0000;
   TIM2->SMCR    &=0x0000;
   TIM2->PSC     &=0x0023;
   TIM2->CCR3    &=0xFFFF;
   TIM2->CCR4    &=0xFFFF;
   
   
   TIM2->ARR     |=0x1388;           // insure that vailid signal cycle is less than 5000us
   TIM2->CCMR1   |=0x0102;           //CC1 channel is configured as input,IC1 is mapped on TI2 while CC2 channel is configured as input,IC2 is mapped on TI2 
   TIM2->DIER    |=0x0041;           //Update (when timer counter equal to 5000 an update event generated combined with a corresponding interruput ) and Trigger interruput are anabled
   TIM2->CCER    |=0x0013;           //Channel1 Congigured to capture at falling adge while Channel2 at rising adge
   TIM2->SMCR    |=0x0064;           //slave mode :reset mode ,Trigger selection:Filterd Timer Input2
   TIM2->PSC     |=0x0023;           //insure the frequence of timer2 is 1MHz
   TIM2->CR1     |=0x0001;           //enable timer2
   
} 
  /* -----------------------------------------------------------------------
  TIM3 Configuration: generate 4 PWM signals with 4 different duty cycles:
  TIM3CLK = 36 MHz, Prescaler = 0x0, TIM3 counter clock = 36 MHz
  TIM3 ARR Register = 999 => TIM3 Frequency = TIM3 counter clock/(ARR + 1) 
  TIM3 Frequency = 36 KHz.
  TIM3 Channel1 duty cycle = (TIM3_CCR1/ TIM3_ARR)* 100 = 50% 
  TIM3 Channel2 duty cycle = (TIM3_CCR2/ TIM3_ARR)* 100 = 37.5% 
  TIM3 Channel3 duty cycle = (TIM3_CCR3/ TIM3_ARR)* 100 = 25%
  TIM3 Channel4 duty cycle = (TIM3_CCR4/ TIM3_ARR)* 100 = 12.5% 
------------------------------------------- ---------------------------- */
void PWMO_INI(void)
{
/* Time base configuration */                            
                                                        //TIM_TimeBaseStructure.TIM_Period = 7199;       
  TIM3_PSC  = 0x0023;                                   //TIM_TimeBaseStructure.TIM_Prescaler = 36;   
  TIM3_CR1 &= 0x00FF&0x009F;                            //TIM_TimeBaseStructure.TIM_ClockDivision = 0;   
  TIM3_CR1 |= 0x0000;                                   //TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
  
 
  TIM3_CCMR1 =0x6868;
  TIM3_CCER  =0x1111; 
}

void PWMO_PreCode(void)
        {
         TIM3_ARR  = 800 ; 
         TIM3_CCR1 = 401;
         TIM3_CCR2 = 401;
         TIM3_CR1 |= 0x0001;
        }
void PWMO_SyInterval(void)
        {
         TIM3_ARR  = 4400 ; 
         TIM3_CCR1 = 401;
         TIM3_CCR2 = 401;
         TIM3_CR1 |= 0x0001;
        }
void PWMO_Code0(void)
       {
        TIM3_ARR  = 1200 ; 
        TIM3_CCR1 = 801;
        TIM3_CCR2 = 801;
        TIM3_CR1 |= 0x0001;
       } 
void PWMO_Code1(void)
        {
         TIM3_ARR  = 1200 ; 
         TIM3_CCR1 = 401;
         TIM3_CCR2 = 401;
         TIM3_CR1 |= 0x0001;
        } 
void PWMO_OverPeriod(void)
        {
         TIM3_ARR  = 6000 ; 
         TIM3_CCR1 = 6001;
         TIM3_CCR2 = 6001;
         TIM3_CR1 |= 0x0001;
        } 
/*******************************************************************************
* Function Name  : void SendData(void)
* Description    :
* Input          :
* Output         : 
* Return         : None
*******************************************************************************/
void SendData(void)
{
  PWMO_INI();
  PWMO_PreCode();
  for(;;)
   {
    if(Pre_Counter>=8)
      break;
   }
  PWMO_SyInterval();
  for(;;)
   {
    if(READY_Flag==1)
      break;
   }
  PWMO_Code1(); 
  for(;;)
   {
    if(Bit_Counter==4)
    {
     // Bit_Counter=0;
      break;
    }
   }
  PWMO_Code0(); 
  for(;;)
   {
    if(Bit_Counter==6)
    {
      //Bit_Counter=0;
      break;
    }
   }
  PWMO_Code1(); 
  for(;;)
   {
    if(Bit_Counter==10)
    {
     // Bit_Counter=0;
      break;
    }   
   }
    PWMO_Code0(); 
  for(;;)
   {
    if(Bit_Counter==21)
    {
     // Bit_Counter=0;
      break;
    }
   }
  PWMO_Code1(); 
  for(;;)
   {
    if(Bit_Counter==37)
    {
      //Bit_Counter=0;
      break;
    }
   }
  PWMO_Code0(); 
  for(;;)
   {
    if(Bit_Counter==59)
    {
     // Bit_Counter=0;
      break;
    } 
   }
    PWMO_Code1(); 
  for(;;)
   {
    if(Bit_Counter==63)
    {
     // Bit_Counter=0;
      break;
    }
   }
    PWMO_Code0(); 
   for(;;)
   {
    if(Bit_Counter==66)
    {
      Bit_Counter=0;
      break;
    } 
   }
  TIM3_CR1 &= 0xFFFE;
  Bit_Counter=0;
}