mstar.c

完整的软件学习--显示器驱动视频软件

  	mStar_WriteByte(0x63, (mStar_ReadByte(0x63)&~BIT3|BIT4|BIT2));  // Disable PWM2
  	mStar_WriteByte(PWMEXT, BIT0);
	mStar_WriteByte(PWMDIV2, 0x01);	
	#else
  	mStar_WriteByte(0x63, mStar_ReadByte(0x63)&~(BIT4|BIT6|BIT7)|(BIT0)); // Disable PWM2, enable pwm0
	#endif  
//#endif MSTMCU


  //========================================================
// #if MSTMCU
 // Patch TSUM RevB
  mStar_WriteByte(REGBK, REGBANK3);
  mStar_WriteByte(0xC6, mStar_ReadByte(0xC6)|BIT0);
  mStar_WriteByte(REGBK, REGBANKSCALER);
  // End Patch	TSUM RevB
// #endif MSTMCU
  //=======================================================
  //=======================================================
  mStar_InitADC();
  mStar_InitTCON();
  mStar_SetupFreeRunMode();
  mStar_SetupInputPort();

  Osd_InitOSD();

//  mStar_WriteDDC1(); // programming DDC1 inside chip
//  mStar_WriteDDC2(); // programming DDC2 inside chip
  mStar_InitGamma(0); // programming gamma table
//  mStar_SetupPattern();
}

//*******************************************************************
// Function Name: mStar_SetupMode
//
// Decscription: setup registers for input timing,
// return      : TRUE,
// caller: mStar_SetupADC(), mStar_SetupCaptureWindow(),
//         mStar_SetScalingFactor(), mStar_SetPanelTiming(),
//         mStar_SetUserPref() in mstar.c
//         mStar_FineTuneDVIPhase(), mStar_ValidTimingDetect() in detect.c
//         mSar_WriteByte(), mStar_ReadByte() in ms_rwreg.c
// callee: mStar_ModeHandler() in detect.c
//*******************************************************************
Bool mStar_SetupMode(void)
{
  mStar_SetupADC(); // setup ADC block, including polarity & htotal, phase, vco
  if (mStar_SetCaptureWindow()==FALSE) // setup capture window
    return FALSE;
  mStar_SetScalingFactor(); // setup scaling factor
  if (mStar_SetPanelTiming()==FALSE) // set output dclk
    return TRUE;
#if 0 //tony 05/12/03  //mode 33 => 1280*1024 72Hz
  if (mStar_ReadWord(SPRHDC_H)==PanelWidth && mStar_ReadWord(SPRVDC_H)==PanelHeight && SrcModeIndex!=33)
    { mStar_SetScalingFilter(0); // programming sharpness
    }
  else if (mStar_ReadWord(SPRHDC_H)==PanelWidth && mStar_ReadWord(SPRVDC_H)==PanelHeight && SrcModeIndex==33)
    { mStar_SetScalingFilter(2); // NVIDA RIVA TNT2
    }
  else if (mStar_ReadWord(SPRHDC_H)==720 && mStar_ReadWord(SPRVDC_H)==400)
    { mStar_SetScalingFilter(2);
    }  
  else if (mStar_ReadWord(SPRHDC_H)<=800 && mStar_ReadWord(SPRVDC_H)<=600)
    { mStar_SetScalingFilter(3);
    }  
  else
    { mStar_SetScalingFilter(2);
    }
#endif


#if (PanelHstSX84) //tony 20040212
  if (mStar_ReadWord(SPRHDC_H)<=800 && mStar_ReadWord(SPRVDC_H)<=600) 
  	{
  	mStar_WriteByte(LPLL_M,mStar_ReadByte(LPLL_M)&~BIT6); //Spread spectrum disable
    mStar_WriteByte(ODRV,0x5f);
  	}
  else
  	{
  	mStar_WriteByte(LPLL_M,mStar_ReadByte(LPLL_M)|BIT6); //Spread spectrum enable
	mStar_WriteByte(ODRV, (PanelDCLKCurrent<<4) | (PanelDECurrent<<6) |
                   (PanelOddDataCurrent<<2) | PanelEvenDataCurrent);  
  	}
#endif

  if (mStar_ReadWord(SPRHDC_H)<=800 && mStar_ReadWord(SPRVDC_H)<=600)
    { 
    mStar_SetScalingFilter(3);
    mStar_WriteByte(FTAPEN, 0x00);	
    }  
  else
    { 
    mStar_SetScalingFilter(2);
    mStar_WriteByte(FTAPEN, 0x01);
    }

#if (PanelAUEN05|PanelAUEG01|PanelAUEG01_v2)  //tony 20040421 for Prv788I 
    if (mStar_ReadWord(SPRHDC_H)==PanelWidth&&mStar_ReadWord(SPRVDC_H)==PanelHeight)
    mStar_WriteByte(OSCCTRL1, 0x63);
	else
    mStar_WriteByte(OSCCTRL1, 0x53);		
#endif    

//-----------------------------------------------    
  //  fine Tune DVI phase to get more stable DVI
  if (SrcInputType==Input_Digital)
    { BYTE dviPhase;
      mStar_WriteByte(REGBK, REGBANKADC); // switch to ADC bank
      // fine turn DVI phase--Red Channel
      dviPhase=mStar_FineTuneDVIPhase(DVI_PHR, RED_CHANNEL);
      if (dviPhase<0xFF)
        mStar_WriteByte(DVI_PHR, DVIPhaseTbl[dviPhase]);
      // fine turn DVI phase--Green Channel
      dviPhase=mStar_FineTuneDVIPhase(DVI_PHG, GREEN_CHANNEL);
      if (dviPhase<0xFF)
      mStar_WriteByte(DVI_PHG, DVIPhaseTbl[dviPhase]);
      // fine turn DVI phase--Blue Channel
      dviPhase=mStar_FineTuneDVIPhase(DVI_PHB, BLUE_CHANNEL);
      if (dviPhase<0xFF)
        mStar_WriteByte(DVI_PHB, DVIPhaseTbl[dviPhase]);

      mStar_WriteByte(REGBK, REGBANKSCALER); // switch to Scaler bank
#if NEWIC_18A
       mStar_WriteByte(MISCFC, 0x38); // enable vsync glitch & protect to make more DVI stable
#else
      mStar_WriteByte(MISCFC, 0x30); // enable vsync glitch & protect to make more DVI stable
#endif
    }

  if (InputTimingChangeFlag || mStar_ValidTimingDetect()) // check if input timing has changed
  	{
    return FALSE;
  	}
//????????????polliwog
 mStar_WriteWord(VDTOT_H, 0x7FF);

#if ChipID==ChipBB
  CheckLineBuffer();
#endif
  // enable double buffer
  mStar_WriteByte(DBFC, 0x05);			// enable double bufer.
  mStar_WriteByte(REGBK, REGBANKADC);
  mStar_WriteByte(DBFC, 0x01);			// enable ADC's double bufer.
  mStar_WriteByte(REGBK, REGBANKSCALER);

  mStar_SetUserPref(); // restore user setting

// use interrupt to speedup mode changing while input timing is changing
#if UseINT
  if (SrcInputType==Input_Analog1)
    mStar_WriteByte(INTENA, 0xB0);
  else
    mStar_WriteByte(INTENA, 0x30); // for YCbCr
#endif
  Clr_FreeRunModeFlag();
  return TRUE;
}


//*******************************************************************
// Function Name: mStar_SetupFreeRunMode
//
// Decscription: setup registers for free run mode without any input timing,
//
// caller: mStar_ResetDClkPLL() in mstar.c
//         mSar_WriteByte(), mStar_ReadByte(), mStar_WriteWord() in ms_rwreg.c
// callee: mStar_ModeHandler() in detect.c
//*******************************************************************
void mStar_SetupFreeRunMode(void)
{ DWORD factor;

  mStar_WriteByte(ISELECT, mStar_ReadByte(ISELECT)|NIS_B);

  // disable output Lock mode to enable free run.
  factor=FreeRunDClk;
#if (!PanelRSDS && !PanelDualPort)
  factor/=2;
#endif
  mStar_WriteWord(LPLL_SET_M, factor&0xFFFF);
  mStar_WriteByte(LPLL_SET_H, factor>>16); // setup output dot clock
  mStar_ResetDClkPLL(); // reset output PLL
//  mStar_WriteByte(LPLL_SET_H, 0x24);
  mStar_WriteWord(VDTOT_H, PanelVTotal-1); // set output panel vtotal
  mStar_WriteWord(HDTOT_H, PanelHTotal-1); // set output panel htotal
  Set_FreeRunModeFlag();
  
#if PanelTB141LA1//Max modify for Costdown_16AK_Audio_A_TB141LA1 @ Nov-11-2004
  mStar_WriteByte(REGBK,REGBANKTCON);
  mStar_WriteByte(IFCTRL, OuputFormat);
  mStar_WriteWord(GAVST_H, GPOA_VStart);
  mStar_WriteWord(GAVEND_H, GPOA_VEnd);
  mStar_WriteByte(REGBK,REGBANKSCALER);  
#endif  
#if EnableVideo656Port
  if(SrcInputType==Input_656Video)
    {
	mStar_WriteByte(FWC,FWC_B);
	mStar_WriteByte(FCR,0x00);
	mStar_WriteByte(FCG,0x00);
	//if(IsInChangeProgramme())
		//mStar_WriteByte(FCB,0x00);		//black
	//else
		mStar_WriteByte(FCB,0xaa);		//blue
    }
#endif
//  printData("enter free run mode %d", SrcInputType);
}

//*******************************************************************
// Function Name: mStar_SetAnalogInputPort
//
// Decscription: setup registers for Separate Sync/Composite Sync/SOG,
//
// caller: mSar_WriteByte(), mStar_ReadByte() in ms_rwreg.c
//
// callee: mStar_MonitorInputTiming() in detect.c
//*******************************************************************
void mStar_SetAnalogInputPort(void)
{ BYTE regValue=mStar_ReadByte(ISELECT);

  if (regValue&COMP_B) // current is SOG
    { regValue=regValue&0x8F;// swtich to auto-detect
    }
  else
    { regValue=regValue|0x70; // switch to SOG-detect
    }
  mStar_WriteByte(ISELECT, regValue);

  mStar_WriteByte(SWRST, GPR_B|ADCR_B); // enable software reset function to clear ADC & Graphic port RO register
  Delay1ms(2);
  mStar_WriteByte(SWRST, 0); // disable software reset
  Delay1ms(80); // delay over 1 frame time to wait for status register is ready
}

//*******************************************************************
// Function Name: mStar_SetupInputPort
//
// Decscription: setup input port registers for
//               Analog/Digital/YCbCr(Video) input
//
// caller: mSar_WriteByte(), mStar_ReadByte() in ms_rwreg.c
// callee: mStar_MonitorInputTiming() in detect.c
//*******************************************************************
void mStar_SetupInputPort(void)
{ BYTE regByte;
  //printData("switch input port %d", SrcInputType);

  regByte=mStar_ReadByte(ISELECT)&(NIS_B|IHSU_B);//fendy
  if (SrcInputType==Input_Analog1)
    { regByte|=(SrcInputType==Input_Analog1)?(ISEL_Analog1):(ISEL_Analog2);
      // setup ADC bank register
      mStar_WriteByte(REGBK, REGBANKADC);
      mStar_WriteByte(GCTRL, 0x6); // Coast Polarity as high
      mStar_WriteByte(VCOCTRL, 0x15);//D); // set VOC
      mStar_WriteByte(SOG_LVL, 0x10); // set SOG level
      // enable test mode to program
      mStar_WriteByte(TESTEN, TSTEN_B);
      //****INPORTANT must enable test mode for programming the following registers
    #if     ADC2Sets
      if (PowerSavingFlag)
        { if (SrcInputType==Input_Analog1)
            mStar_WriteByte(TESTA5, 0x9E);//mStar_ReadByte(TESTA5)&(~AMUX_B));
          else
           mStar_WriteByte(TESTA5, 0xBE);//mStar_ReadByte(TESTA5)|AMUX_B);
      	}
    #endif
      mStar_WriteByte(TESTA0, 0x00); //set pll charge pump current for ADC
      mStar_WriteByte(TESTEN, 0);  // disable test mode
      mStar_WriteByte(PLLCTRLV, 0x95);

      // setup Scaler bank
      mStar_WriteByte(REGBK, REGBANKSCALER);
      mStar_WriteByte(IPCTRL2, DEON_B|VSE_B);
      mStar_WriteByte(LVL, 0);
      mStar_WriteByte(INTMDS, 0x00);   // Interlace mode line shift
      
    mStar_WriteByte(COCTRL1, 0x01);   // enable ADC coast
    mStar_WriteByte(COCTRL2, 0x03);   // enable coast window start
    mStar_WriteByte(COCTRL3, 0x01);   // enable coast window end
  
      mStar_WriteByte(ISCTRL, 0x0);// disable DE glitch removal function & more tolerance for DE
#if NEWIC_18A
      mStar_WriteByte(MISCFC, 0x08);
#else
      mStar_WriteByte(MISCFC, 0);//x20);//
#endif  


}
  else if (SrcInputType==Input_Digital)
    { regByte|=ISEL_DVI|COMP_B;
    #if ADC2Sets
      if (PowerSavingFlag)
        { mStar_WriteByte(REGBK, REGBANKADC);
          mStar_WriteByte(TESTEN, TSTEN_B);
          mStar_WriteByte(TESTA0, 0x20); //+--- set pll charge pump current for ADC
          mStar_WriteByte(TESTA5, 0x86);
          mStar_WriteByte(TESTEN, 0);
          mStar_WriteByte(REGBK, REGBANKSCALER);
      	}
    #endif
      // setup Scaler bank
      mStar_WriteByte(IPCTRL2, DEON_B|DHSR_B|VSE_B);
      mStar_WriteByte(ISCTRL, 0xF0);//0xF8);// enable DE glitch removal function & more tolerance for DE
#if NEWIC_18A
      mStar_WriteByte(MISCFC, 0x28);
#else
      mStar_WriteByte(MISCFC, 0x20);// enable vsync glitch removal for digital input
#endif  
mStar_WriteByte(COCTRL1, 0x0);   // disable ADC coast
    }
  else if (SrcInputType==Input_YPbPr) // YPbPr is from Analog port
    {
    #if 1// 1 for YPbPr
      regByte|=CSC_B|0x70;

      mStar_WriteByte(REGBK, REGBANKADC);
      mStar_WriteByte(GCTRL, 0x6); // Coast Polarity as high
      mStar_WriteByte(VCOCTRL, 0x05);//D); // set VOC
      mStar_WriteByte(SOG_LVL, RMID_B|BMID_B|OFIR_B|0x08); // set SOG level
      mStar_WriteByte(TESTEN, TSTEN_B);
      //****INPORTANT must enable test mode for programming the following registers
    #if ADC2Sets
      if (PowerSavingFlag)
        mStar_WriteByte(TESTA5, 0x9E);//mStar_ReadByte(TESTA5)&~AMUX_B);
    #endif
      mStar_WriteByte(TESTA0, 0); //set pll charge pump current for ADC
      mStar_WriteByte(TESTEN, 0);
      mStar_WriteByte(PLLCTRLV, 0x95); // PLL contol for Video input

      // setup Scaler bank
      mStar_WriteByte(REGBK, REGBANKSCALER);
      mStar_WriteByte(IPCTRL2, DEON_B|ESLS_B);
   #else // for 1080i
     regByte|=0x70;

     mStar_WriteByte(REGBK, REGBANKADC);
     mStar_WriteByte(GCTRL, 0x6); // Coast Polarity as high
     mStar_WriteByte(VCOCTRL, 0x15);//D); // set VOC
     mStar_WriteByte(SOG_LVL, 0x10);//RMID_B|BMID_B|OFIR_B|0x08); // set SOG level
     mStar_WriteByte(TESTEN, TSTEN_B);
     //****INPORTANT must enable test mode for programming the following registers
    #if ADC2Sets
     if (PowerSavingFlag)
       mStar_WriteByte(TESTA5, 0x9E);//mStar_ReadByte(TESTA5)&~AMUX_B);
    #endif
     mStar_WriteByte(TESTA0, 0); //set pll charge pump current for ADC
     mStar_WriteByte(TESTEN, 0);
     mStar_WriteByte(PLLCTRLV, 0x95); // PLL contol for Video input

     // setup Scaler bank
     mStar_WriteByte(REGBK, REGBANKSCALER);
     mStar_WriteByte(IPCTRL2, DEON_B|VSE_B);
   #endif
      mStar_WriteByte(LVL, 4);
      mStar_WriteByte(INTMDS, 0x00);   // Interlace mode line shift
      mStar_WriteByte(COCTRL1, 0x21);   // enable ADC coast
      mStar_WriteByte(COCTRL2, 0x08);   // enable coast window start
      mStar_WriteByte(COCTRL3, 0x05);   // enable coast window end
      mStar_WriteByte(ISCTRL, 0x0);// disable DE glitch removal function & more tolerance for DE
#if NEWIC_18A
      mStar_WriteByte(MISCFC, 0x08);
#else
      mStar_WriteByte(MISCFC, 0x00);//x20);//
#endif      
	  }
    else if (SrcInputType==Input_656Video) // 656Video is from 656 port  TING MODIFY
    {
     regByte|=ISEL_Video|CSC_B;
      mStar_WriteByte(IPCTRL2, DEON_B|DHSR_B);

      mStar_WriteByte(LVL, 4);
//===============================jt add for SAMYO panel 20040903==========
#if 0//PanelTypeName==PN_TTL_TM080
	if(IsInputPal())
		{
		mStar_WriteByte(INTMDS, 0x02);   // Interlace mode line shift for PAL (SAMYO 8")
		}
	else if(IsInputNtsc())
		{
		mStar_WriteByte(INTMDS, 0x01);   // Interlace mode line shift for NTSC (SAMYO 8")
		}
	else
		mStar_WriteByte(INTMDS, 0x02);   // Interlace mode line shift for PAL (SAMYO 8")
//=================================================================
#else
      mStar_WriteByte(INTMDS, 0x01);   // Interlace mode line shift for PAL (HITACHI 7")
#endif
      mStar_WriteByte(COCTRL1, 0x21);   // enable ADC coast
      mStar_WriteByte(COCTRL2, 0x08);   // enable coast window start
      mStar_WriteByte(COCTRL3, 0x05);   // enable coast window end
      mStar_WriteByte(ISCTRL, 0x0);// disable DE glitch removal function & more tolerance for DE
      mStar_WriteByte(MISCFC, 0);//x20);//
      //if(EnableDeinterlaceChipFlag)
       // mStar_WriteByte(ISOVRD, 0x01);//Vick :force non-interlace mode
      //else
        mStar_WriteByte(ISOVRD, 0x03);//Vick :force interlace mode
      mStar_WriteByte(MDCTRL, 0x00);   // set IFA bit for SA7114  howard

    }