hw_dwdma.c

RK27驱动

/******************************************************************/
/*   Copyright (C) 2007 ROCK-CHIPS FUZHOU . All Rights Reserved.  */
/*******************************************************************
File	:  hw_Dwdma.c
Desc	:  Dwdma配置
		  
Author	:  nzy
Date	: 
Notes	: 

$Log	: 
*********************************************************************/
#include "hw_include.h"
#include "hw_Dwdma.h"




/*---------------------------------------------------------
Name  :  DWDMA_PowerOnInit
Dec   :  DWDMA上电初始化
Params:  
Return:  
Author:  nzy
Date  :  
-----------------------------------------------------------*/
void DWDMA_PowerOnInit(void)
{
    WriteReg32(DWDMA_ChEnReg, 0xf00);   //clear all channel    
    WriteReg32(DWDMA_ClearBlock, 0xf);       
    WriteReg32(DWDMA_DmaCfgReg, 0x1);
}


/*---------------------------------------------------------
Name  :  DWDMA_Transmit
Dec   :  DWDMA上电初始化
Params:  
Return:  
Author:  nzy
Date  :  
-----------------------------------------------------------*/
void DWDMA_Transmit(DWDMA_CHN Channel, DWDMALLP *LLP, DWDMA_HS HandShack)
{
    WriteReg32(DWDMA_SAR(Channel),  0);   
    WriteReg32(DWDMA_DAR(Channel),  0);
    WriteReg32(DWDMA_LLP(Channel),  (UINT32)LLP);
    WriteReg32(DWDMA_CTLL(Channel), b_CTLL_MEM2PER_DWDMA| b_CTLL_DMS_AM1|
                                    b_CTLL_SRC_GATHER_EN|b_CTLL_DST_SCATTER_EN|
		                            b_CTLL_DST_TR_WIDTH_32|b_CTLL_SRC_TR_WIDTH_32|
		                            b_CTLL_DEST_MSIZE_16|b_CTLL_SRC_MSIZE_16|
		                            b_CTLL_LLP_DST_EN|b_CTLL_LLP_SRC_EN);   
    WriteReg32(DWDMA_CTLH(Channel), 1);
    WriteReg32(DWDMA_CFGL(Channel), b_CFGL_CH_PRIOR(7));   
    WriteReg32(DWDMA_CFGH(Channel), b_CFGH_DEST_PER(HandShack)|b_CFGH_PROTCTL);
    WriteReg32(DWDMA_SGR(Channel),  13<<20);
    WriteReg32(DWDMA_DSR(Channel),  1024<<20);
	WriteReg32(DWDMA_ChEnReg,       b_DWDMA_CHEN(Channel));
}


/*---------------------------------------------------------
Name  :  DWDMA_LLPCfg
Dec   :  配置LLP所指向的LLI
Params:  CurLLP   -> 表示当前LLP所指
         SourAddr -> 源地址
         DestAddr -> 目的地址
         BSize    -> 单次传输的32位数据量
Return:  
Author:  nzy
Date  :  
-----------------------------------------------------------*/
void DWDMA_LLPCfg(UINT32 SourAddr,  UINT32 DestAddr, 
                  DWDMALLP *CurLLP, UINT32 BSize)
{
    CurLLP->Sar   = SourAddr;
	CurLLP->Dar   = DestAddr;
    CurLLP->LLP   = CurLLP+1;
    CurLLP->CtrlH = BSize;	
	CurLLP->CtrlL = b_CTLL_MEM2PER_DWDMA| b_CTLL_DMS_AM1|
                    b_CTLL_SRC_GATHER_EN|b_CTLL_DST_SCATTER_EN|
		            b_CTLL_DST_TR_WIDTH_32|b_CTLL_SRC_TR_WIDTH_32|
		            b_CTLL_DEST_MSIZE_16|b_CTLL_SRC_MSIZE_16|
		            b_CTLL_LLP_DST_EN|b_CTLL_LLP_SRC_EN;
}


/*---------------------------------------------------------
Name  :  DWDMA_LLPEnd
Dec   :  结束LLP的指向
Params:  CurLLP   -> 表示当前LLP所指
Return:  
Author:  nzy
Date  :  
-----------------------------------------------------------*/
void DWDMA_LLPEnd(DWDMALLP *CurLLP)
{
    CurLLP->CtrlL &= (~b_CTLL_LLP_DST_EN)&(~b_CTLL_LLP_SRC_EN);
}


/*---------------------------------------------------------
Name  :  DWDMA_LLPChange
Dec   :  改变LLP的指向
Params:  CurLLP   -> 表示当前LLP所指
         NextLLP  -> 表示LLP的下个链接
Return:  
Author:  nzy
Date  :  
-----------------------------------------------------------*/
void DWDMA_LLPChange(DWDMALLP *CurLLP, DWDMALLP *NextLLP)
{
    CurLLP->LLP   = NextLLP;
}