fm25cl64.h
来自「FM25CL64 FRAM IC controlled through SPI 」· C头文件 代码 · 共 51 行
H
51 行
//-------------------- FM25LC64 SPI FRAM 8kbyte memory modul header file -------------------------------------
#define CS_MEM PD4 //PC1
#define CS_MEM_PORT PORTD // memory chip select port, active low level!
#define CS_MEM_BIT BIT4
#define CS_MEM_DIR DDRD
#define CS_MEM_ON clearbit(CS_MEM_PORT,CS_MEM)
#define CS_MEM_OFF setbit(CS_MEM_PORT,CS_MEM)
#define MemoryWriteInProgress() while(ReadMemoryStatus() & 0x01) DELAY_50US_10MHz;
void MemoryWriteEnable(void) // nem kell ut醤a MemoryWriteInProgress v醨akoz醩
{
CS_MEM_ON;
SPDR=0x06; // write enable bit set in the memory status register instruction
while(!(SPSR & (1<<SPIF)));
CS_MEM_OFF;
}
void MemoryWriteDisable(void) // nem kell ut醤a MemoryWriteInProgress v醨akoz醩
{
CS_MEM_ON;
SPDR=0x04; // write enable bit reset in the memory status register instruction
while(!(SPSR & (1<<SPIF)));
CS_MEM_OFF;
}
unsigned char ReadMemoryStatus(void)
{
CS_MEM_ON;
SPDR=0x05; // read memory status register instruction
while(!(SPSR & (1<<SPIF))); // waits for the SPI transmit to be finished
SPDR=0x00;
while(!(SPSR & (1<<SPIF)));
CS_MEM_OFF;
return SPDR;
}
void WriteMemoryStatus(unsigned char data) // kell ut醤a MemoryWriteInProgress v醨akoz醩 illetve MemoryWriteEnable
{
CS_MEM_ON;
SPDR=0x01; // write memory status register instruction
while(!(SPSR & (1<<SPIF))); // waits for the SPI transmit to be finished
SPDR=data;
while(!(SPSR & (1<<SPIF)));
CS_MEM_OFF;
MemoryWriteInProgress();
MemoryWriteEnable();
}
void WriteMemory(unsigned int address,unsigned char data) // ~32us id
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