audioctl.cpp

Windows CE 6.0 BSP for the Beagle Board.

    TSC2101Write(m_hSPI, TSC2101_AUDCTRL_3, uiTmp);

    // program the PLL's
    if (SAMPLERATE == 44100)
    {
        // 44.1 KHz, 12 MHz MCLK, 5264 D_VAL
        TSC2101Write(m_hSPI, TSC2101_AUDCTRL_PLL0, PLL1_PLLSEL | PLL1_PVAL(1) | PLL1_I_VAL(7));
        TSC2101Write(m_hSPI, TSC2101_AUDCTRL_PLL1, PLL2_D_VAL(5264));
    }
    else
    {
        // 48 KHz, 12 MHz MCLK, 1920 D_VAL
        TSC2101Write(m_hSPI, TSC2101_AUDCTRL_PLL0, PLL1_PLLSEL | PLL1_PVAL(1) | PLL1_I_VAL(8));
        TSC2101Write(m_hSPI, TSC2101_AUDCTRL_PLL1, PLL2_D_VAL(1920));
    }

    // go into idle mode and configure the clocks
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_PCR, MCBSP_IDLEEN | MCBSP_CLKRM | MCBSP_SCLKME |
                MCBSP_FSXP | MCBSP_FSRP | MCBSP_CLKXP | MCBSP_CLKRP);

    if (BITSPERSAMPLE == 20) uiTmp = MCBSP_WORD_20;
    else if (BITSPERSAMPLE == 24) uiTmp = MCBSP_WORD_24;
    else if (BITSPERSAMPLE == 32) uiTmp = MCBSP_WORD_32;
    else uiTmp = MCBSP_WORD_16;

    // receive 1 word of BITSPERSAMPLE in a frame,
    // in 2 phases (1 word each) with a 1-bit delay
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_RCR1, MCBSP_RFRLEN1(0) | MCBSP_RWDLEN1(uiTmp));
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_RCR2, MCBSP_RPHASE | MCBSP_RFRLEN2(0) |
                MCBSP_RWDLEN2(uiTmp) | MCBSP_RDATDLY(1));

    // transmit 1 word of BITSPERSAMPLE in a frame,
    // in 2 phases (1 word each) with a 1-bit delay
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_XCR1, MCBSP_XFRLEN1(0) | MCBSP_XWDLEN1(uiTmp));
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_XCR2, MCBSP_XPHASE | MCBSP_XFRLEN2(0) |
                MCBSP_XWDLEN2(uiTmp) | MCBSP_XDATDLY(1) | MCBSP_XFIG);

    // set the clocks
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_SRGR1, MCBSP_FWID(BITSPERSAMPLE - 1) |
                MCBSP_CLKGDV(0));
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_SRGR2, MCBSP_GSYNC | MCBSP_CLKSP |
                MCBSP_FSGM | MCBSP_FPER(BITSPERSAMPLE * 2 - 1));

    //Left Justify, Clockstop with no delay, Receiver Disabled
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_SPCR1, MCBSP_RINTM(3));

    // Set transmit interrupt on XSYNCERR.
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_SPCR2, MCBSP_FREE | MCBSP_XINTM(3));

    // Delay while new divisors take effect.
    Sleep(100);
}

//------------------------------------------------------------------------------
//
//  Function: InitModemPort() 
//  
//  Configures the modem port. 
//

void 
ACAudioHWContext::InitModemPort()
{
    DEBUGMSG(ZONE_AC, (L"+ACAudioHWContext::InitModemPort()\r\n"));

    // Modem Port Control register
/*    USHORT usVal = 0;

    OUTREG16(&m_pMCBSPRegisters->usMCBSP_MPCTR,usVal);

    // Modem Main Port Configuration register
    usVal = INREG16(&m_pMCBSPRegisters->usMCBSP_MPMCCFR);
    usVal &= 8000;
                    //  Data justify left, filled with zero 
                    //  Expand and compand disabled.
#ifndef NO_EAC_MIXING
    usVal |= BIT8;  //  Master mode(Lead2 GSM voice is slave)
#endif
    usVal |= BIT7;  //  Frame Sync rising
    usVal |= BIT6;  //  Frame Sync active high
    usVal |= BIT5;  //  Bit clock polarity rising
    usVal |= 0x0F;  //  16 bit
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_MPMCCFR,usVal);

    // Set the registers first before enabling the 
    // channel, otherwise 
    usVal = INREG16(&m_pMCBSPRegisters->usMCBSP_MPCTR);
    usVal |= BIT3;  // Prescale clock divisor
    usVal |= BIT7;  // Enable main channel
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_MPCTR,usVal);

    // Enable the clock at the last step
    usVal |= BIT0;  // Clock running
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_MPCTR,usVal);
*/
}

//------------------------------------------------------------------------------
//
//  Function: InitBluetoothPort() 
//  
//  Configures the bluetooth port. 
//


void 
ACAudioHWContext::InitBluetoothPort()
{
    DEBUGMSG(ZONE_AC, (L"ACAudioHWContext::InitBluetoothPort()\r\n"));

    // Bluetooth Port Control register
/*    USHORT usVal = 0;

    OUTREG16(&m_pMCBSPRegisters->usMCBSP_BPCTR,usVal);

    // Bluetooth Main Port Configuration register
    usVal = INREG16(&m_pMCBSPRegisters->usMCBSP_BPMCCFR);
    usVal &= 8000;
                    //  Data justify left, filled with zero 
                    //  Expand and compand disabled.
                    //  Slave mode (Syren is master)
    usVal |= BIT7;  //  Frame Sync rising
    usVal |= BIT6;  //  Frame Sync active high
    usVal |= BIT5;  //  Clock Sync rising
    usVal |= 0x0F;  //  16 bit,
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_BPMCCFR,usVal);

    // Set the registers first before enabling the 
    // channel
    usVal = INREG16(&m_pMCBSPRegisters->usMCBSP_BPCTR);
    usVal |= BIT3;  // Prescale clock divisor 16
    usVal |= BIT7;  // Enable main channel
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_BPCTR,usVal);

    // Enable the clock at the last step
    usVal |= BIT0;  // Clock running
    OUTREG16(&m_pMCBSPRegisters->usMCBSP_BPCTR,usVal);
*/    
}

//------------------------------------------------------------------------------
//
//  Function:  HWInitController
//  
//  Main init of uWire controller for OZ Board based on SAMPLERATE and MCLK.
//  Defaults are 16bit/stereo samples.
//  
//

void 
ACAudioHWContext::HWInitController()
{
    DEBUGMSG(ZONE_AC, (L"+ACAudioHWContext::HWInitController()\r\n"));

    // power everything up and configure it
    HWPowerUp();
    InitCodecPort();
    InitModemPort();
    InitBluetoothPort();

#if defined(TEST_TONE)
    HWEnableInputChannel(TRUE);
    HWEnableOutputChannel(TRUE);
    TestTone(m_pMCBSPRegisters);
    HWEnableInputChannel(FALSE);
    HWEnableOutputChannel(FALSE);
#endif

#ifdef DEBUG
    DumpMCBSPRegisters();
#endif
}

//------------------------------------------------------------------------------
//
//  Function:  HWPowerUp()
//  
//  Power up the uWire controller using MCLK.
//

void 
ACAudioHWContext::HWPowerUp()
{
    DEBUGMSG(ZONE_AC, (L"+ACAudioHWContext::HWPowerUp()\r\n"));

    SetControllerClocks(TRUE);
}

//------------------------------------------------------------------------------
//
//  Function:  HWPowerDown
//  
//
//  Power down the EAC controller using MCLK.
//

void ACAudioHWContext::HWPowerDown()
{
    DEBUGMSG(ZONE_AC,(L"AC: HWPowerDown()\r\n"));

    SetControllerClocks(FALSE);
}

//------------------------------------------------------------------------------
//
//  Function:  SetControllerClocks
//  
//  Set the Oscillator and MCLK of the EAC controller. 
//

void 
ACAudioHWContext::SetControllerClocks(BOOL fOn)
{
    DEBUGMSG(ZONE_AC,(L"AC: SetControllerClocks (%x)\r\n", fOn));

    DWORD regBit, cbRet;

    if (fOn)
    {
        // enable the McBSP clocks
        regBit = AUDIO_PRCM_FCLKEN_MCBSP;
        KernelIoControl(IOCTL_FCLK1_ENB, (VOID *)&regBit, sizeof(DWORD), NULL, 0, &cbRet);
        regBit = AUDIO_PRCM_ICLKEN_MCBSP;
        KernelIoControl(IOCTL_ICLK1_ENB, (VOID *)&regBit, sizeof(DWORD), NULL, 0, &cbRet);
    }
    else 
    {
        // disable the McBSP clocks
        regBit = AUDIO_PRCM_FCLKEN_MCBSP;
        KernelIoControl(IOCTL_FCLK1_DIS, (VOID *)&regBit, sizeof(DWORD), NULL, 0, &cbRet);
        regBit = AUDIO_PRCM_ICLKEN_MCBSP;
        KernelIoControl(IOCTL_ICLK1_DIS, (VOID *)&regBit, sizeof(DWORD), NULL, 0, &cbRet);
    }
}

//------------------------------------------------------------------------------
//
//  Function: SetRecordMemoPath  
//  
//  
//  Control the record memo path using K6 to connect modem input with wave input
//

void 
ACAudioHWContext::SetRecordMemoPath(BOOL fSetOn)
{
    DEBUGMSG(ZONE_AC,(L"AC: SetRecordMemoPath(%x)\r\n", 1));

/*    USHORT usVal;
 
    usVal = INREG16(&m_pMCBSPRegisters->usMCBSP_AMSCFR);
    
    // Let a memo or talk get through
    if(fSetOn)
    {
        usVal |= BIT5;
        usVal |= BIT7;  
        usVal &=~BIT1; // we must turn off K2 here due to sidetone

        // dev note: enabling K8 may cause extensive sideton feedback on some devices
        // it may be necessary to open K2 to avoid this effect
    }
    else
    {
        usVal &= ~BIT5;
        usVal &= ~BIT7;
        usVal |=  BIT1;
    }

    OUTREG16(&m_pMCBSPRegisters->usMCBSP_AMSCFR,usVal);
*/
}

//------------------------------------------------------------------------------
//
//  Function: HWEnableInputChannel 
//  
//  Enable/Disable audio input channel
//
//
//

void 
ACAudioHWContext::HWEnableInputChannel(BOOL fEnable)
{
    DEBUGMSG(ZONE_AC,(L"AC: HWEnableInputChannel (%x)\r\n", 1));

    // enable or disable the receiver
    if (fEnable)
    {
        SETREG16(&m_pMCBSPRegisters->usMCBSP_SPCR1, MCBSP_RRST);
    }
    else
    {
        CLRREG16(&m_pMCBSPRegisters->usMCBSP_SPCR1, MCBSP_RRST);
    }
}

//------------------------------------------------------------------------------
//
//  Function: EnableOutputChannel 
//  
//  Enable/Disable audio output channel
//
//

void 
ACAudioHWContext::HWEnableOutputChannel(BOOL fEnable)
{
    DEBUGMSG(ZONE_AC,(L"AC: HWEnableOutputChannel (%x)\r\n", fEnable));

    // enable or disable the transmitter
    if (fEnable)
    {
        SETREG16(&m_pMCBSPRegisters->usMCBSP_SPCR2, MCBSP_XRST | MCBSP_GRST | MCBSP_FRST);
    }
    else
    {
        CLRREG16(&m_pMCBSPRegisters->usMCBSP_SPCR2, MCBSP_XRST);
    }
}

//------------------------------------------------------------------------------
//
//  Function:  ConfigEacBTAuSpiPins
//  
//  Configures pins to either EAC BT auSPI or GPIO functionality.
//

void 
ACAudioHWContext::ConfigEacBTAuSpiPins(PIN_FUNC PinFunction)
{
    DEBUGMSG(ZONE_AC, (L"ACAudioHWContext::ConfigEacBTAuSpiPins(%x)\r\n", PinFunction));
/*
    // Disable AuSpi clock
    CLRREG16(&m_pMCBSPRegisters->usMCBSP_BPCTR,BIT0);

    switch(PinFunction)
    {
    case V3U3V2T4_TO_EAC_BT_AUSPI:
        CLRREG32(&m_pCFGRegs->MODE1,MODE1_INTERNAL_BTAUSPI_SOURCE_BITS); 
        SETREG32(&m_pCFGRegs->MODE1,MODE1_V3U3V2T4_AS_BTAUSPI_SOURCE); 
        break;
        
    case W6R9Y6Y5_TO_EAC_BT_AUSPI:
        CLRREG32(&m_pCFGRegs->MODE1, MODE1_INTERNAL_BTAUSPI_SOURCE_BITS); 
        SETREG32(&m_pCFGRegs->MODE1, MODE1_W6R9Y6Y5_AS_BTAUSPI_SOURCE);         
        break;  
    } 

    // Enable AuSpi clocks
    SETREG16(&m_pMCBSPRegisters->usMCBSP_BPCTR,BIT0);
*/    
}

//------------------------------------------------------------------------------
//
//  Function:  SetAMRcapture
//  

BOOL 
ACAudioHWContext::SetAMRcapture(BOOL fStart)
{
    DEBUGMSG(ZONE_AC, (L"ACAudioHWContext::SetAMRcapture(%d)\r\n", fStart));

/*    // Start AMR capture. 
    if (fStart)
    {
        CLRREG32(&m_pCFGRegs->IO_CONFIG2,(BIT7|BIT6|BIT5));       // Bt port

        // GSM SYREN VOICE.
        SETREG32(&m_pCFGRegs->IO_CONFIG2, BIT5);                    

        // Select Bt pins to lead2 vspi port.
        CLRREG32(&m_pCFGRegs->MODE1,(BIT1|BIT0));               
    }

    // Stop AMR capture. 
    else
    {
        CLRREG32(&m_pCFGRegs->IO_CONFIG2,(BIT7|BIT6|BIT5));       // Bt port

        // Select Bt pins to lead2 vspi port.
        SETREG32(&m_pCFGRegs->MODE1,(BIT1|BIT0));                      

        // Select EAC modem to lead2 vspi port.
        SETREG32(&m_pCFGRegs->MODE1,BIT0);                       
    }
*/
    return TRUE;
}

//------------------------------------------------------------------------------
//
//  Function:  ACAudioHWContext::DumpMCBSPRegisters()
//  
//  debug helper function dumps all of the configuration registers  
//

void 
ACAudioHWContext::DumpMCBSPRegisters()
{
    WORD    wReg, wData;

    DEBUGMSG(ZONE_AC, (L"AC: McBSP Registers\r\n"));
    DEBUGMSG(ZONE_AC, (L"AC:    DRR2:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_DRR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    DRR1:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_DRR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    DXR2:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_DXR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    DXR1:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_DXR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    SPCR1: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_SPCR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    SPCR2: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_SPCR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    PCR:   %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_PCR)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCR1:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCR2:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCR1:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCR2:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    SRGR1: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_SRGR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    SRGR2: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_SRGR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    MCR1:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_MCR1)));
    DEBUGMSG(ZONE_AC, (L"AC:    MCR2:  %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_MCR2)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERA: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERA)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERB: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERB)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERC: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERC)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERD: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERD)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERE: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERE)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERF: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERF)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERG: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERG)));
    DEBUGMSG(ZONE_AC, (L"AC:    RCERH: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_RCERH)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERA: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERA)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERB: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERB)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERC: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERC)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERD: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERD)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERE: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERE)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERF: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERF)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERG: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERG)));
    DEBUGMSG(ZONE_AC, (L"AC:    XCERH: %04X\r\n", INREG16(&m_pMCBSPRegisters->usMCBSP_XCERH)));
    DEBUGMSG(ZONE_AC, (L"AC: TSC2101 Page 2 Registers:\r\n"));
    for (wReg = 0; wReg < 0x28; wReg++)
    {
        wData = TSC2101Read(m_hSPI, wReg << 5);
        DEBUGMSG(ZONE_AC, (L"AC:    Register[%02X] = %04X\r\n", wReg, wData));
    }
}