omap2420_l4.h

Windows CE 6.0 BSP for the Beagle Board.

   volatile unsigned long ulREGION_58_H;  //offset 0x4D4,
   volatile unsigned long ulREGION_59_L;  //offset 0x4D8,
   volatile unsigned long ulREGION_59_H;  //offset 0x4DC,
   volatile unsigned long ulREGION_60_L;  //offset 0x4E0,
   volatile unsigned long ulREGION_60_H;  //offset 0x4E4,
   volatile unsigned long ulREGION_61_L;  //offset 0x4E8,
   volatile unsigned long ulREGION_61_H;  //offset 0x4EC,
   volatile unsigned long ulREGION_62_L;  //offset 0x4F0,
   volatile unsigned long ulREGION_62_H;  //offset 0x4F4,
   volatile unsigned long ulREGION_63_L;  //offset 0x4F8,
   volatile unsigned long ulREGION_63_H;  //offset 0x4FC,
   volatile unsigned long ulREGION_64_L;  //offset 0x500,
   volatile unsigned long ulREGION_64_H;  //offset 0x50C,
   volatile unsigned long ulREGION_65_L;  //offset 0x510,
   volatile unsigned long ulREGION_65_H;  //offset 0x514,
   volatile unsigned long ulREGION_66_L;  //offset 0x518,
   volatile unsigned long ulREGION_66_H;  //offset 0x51C,
   volatile unsigned long ulREGION_67_L;  //offset 0x520,
   volatile unsigned long ulREGION_67_H;  //offset 0x304,
   volatile unsigned long ulREGION_68_L;  //offset 0x300,
   volatile unsigned long ulREGION_68_H;  //offset 0x304,
   volatile unsigned long ulREGION_69_L;  //offset 0x300,
   volatile unsigned long ulREGION_69_H;  //offset 0x304,
   volatile unsigned long ulREGION_70_L;  //offset 0x300,
   volatile unsigned long ulREGION_70_H;  //offset 0x304,
   volatile unsigned long ulREGION_71_L;  //offset 0x300,
   volatile unsigned long ulREGION_71_H;  //offset 0x304,
   volatile unsigned long ulREGION_72_L;  //offset 0x308,
   volatile unsigned long ulREGION_72_H;  //offset 0x30C,
   volatile unsigned long ulREGION_73_L;  //offset 0x300,
   volatile unsigned long ulREGION_73_H;  //offset 0x304,
   volatile unsigned long ulREGION_74_L;  //offset 0x300,
   volatile unsigned long ulREGION_74_H;  //offset 0x304,
   volatile unsigned long ulREGION_75_L;  //offset 0x300,
   volatile unsigned long ulREGION_75_H;  //offset 0x304,
   volatile unsigned long ulREGION_76_L;  //offset 0x300,
   volatile unsigned long ulREGION_76_H;  //offset 0x304,
   volatile unsigned long ulREGION_77_L;  //offset 0x300,
   volatile unsigned long ulREGION_77_H;  //offset 0x304,
   volatile unsigned long ulREGION_78_L;  //offset 0x300,
   volatile unsigned long ulREGION_78_H;  //offset 0x304,
   volatile unsigned long ulREGION_79_L;  //offset 0x300,
   volatile unsigned long ulREGION_79_H;  //offset 0x304,
   volatile unsigned long ulREGION_80_L;  //offset 0x300,
   volatile unsigned long ulREGION_80_H;  //offset 0x304,
   volatile unsigned long ulREGION_81_L;  //offset 0x300,
   volatile unsigned long ulREGION_81_H;  //offset 0x304,
   volatile unsigned long ulREGION_82_L;  //offset 0x300,
   volatile unsigned long ulREGION_82_H;  //offset 0x304,
   volatile unsigned long ulREGION_83_L;  //offset 0x300,
   volatile unsigned long ulREGION_83_H;  //offset 0x304,
   volatile unsigned long ulREGION_84_L;  //offset 0x300,
   volatile unsigned long ulREGION_84_H;  //offset 0x304,
   volatile unsigned long ulREGION_85_L;  //offset 0x300,
   volatile unsigned long ulREGION_85_H;  //offset 0x304,
   volatile unsigned long ulREGION_86_L;  //offset 0x300,
   volatile unsigned long ulREGION_86_H;  //offset 0x304,
   volatile unsigned long ulREGION_87_L;  //offset 0x300,
   volatile unsigned long ulREGION_87_H;  //offset 0x304,
   volatile unsigned long ulREGION_88_L;  //offset 0x300,
   volatile unsigned long ulREGION_88_H;  //offset 0x304,
   volatile unsigned long ulREGION_89_L;  //offset 0x300,
   volatile unsigned long ulREGION_89_H;  //offset 0x304,
   volatile unsigned long ulREGION_90_L;  //offset 0x300,
   volatile unsigned long ulREGION_90_H;  //offset 0x304,
   volatile unsigned long ulREGION_91_L;  //offset 0x300,
   volatile unsigned long ulREGION_91_H;  //offset 0x304,
   volatile unsigned long ulREGION_92_L;  //offset 0x300,
   volatile unsigned long ulREGION_92_H;  //offset 0x304,
   volatile unsigned long ulREGION_93_L;  //offset 0x300,
   volatile unsigned long ulREGION_93_H;  //offset 0x304,
   volatile unsigned long ulREGION_94_L;  //offset 0x300,
   volatile unsigned long ulREGION_94_H;  //offset 0x304,
   volatile unsigned long ulREGION_95_L;  //offset 0x300,
   volatile unsigned long ulREGION_95_H;  //offset 0x304,
   volatile unsigned long ulREGION_96_L;  //offset 0x300,
   volatile unsigned long ulREGION_96_H;  //offset 0x304,
   volatile unsigned long ulREGION_97_L;  //offset 0x300,
   volatile unsigned long ulREGION_97_H;  //offset 0x304,
   volatile unsigned long ulREGION_98_L;  //offset 0x300,
   volatile unsigned long ulREGION_98_H;  //offset 0x304,
   volatile unsigned long ulREGION_99_L;  //offset 0x300,
   volatile unsigned long ulREGION_99_H;  //offset 0x304,
   volatile unsigned long ulREGION_100_L;  //offset 0x300,
   volatile unsigned long ulREGION_100_H;  //offset 0x304,
   volatile unsigned long ulREGION_101_L;  //offset 0x300,
   volatile unsigned long ulREGION_101_H;  //offset 0x304,
   volatile unsigned long ulREGION_102_L;  //offset 0x300,
   volatile unsigned long ulREGION_102_H;  //offset 0x304,
   volatile unsigned long ulREGION_103_L;  //offset 0x300,
   volatile unsigned long ulREGION_103_H;  //offset 0x304,
   volatile unsigned long ulREGION_104_L;  //offset 0x300,
   volatile unsigned long ulREGION_104_H;  //offset 0x304,
   volatile unsigned long ulREGION_105_L;  //offset 0x300,
   volatile unsigned long ulREGION_105_H;  //offset 0x304,
   volatile unsigned long ulREGION_106_L;  //offset 0x300,
   volatile unsigned long ulREGION_106_H;  //offset 0x304,
   volatile unsigned long ulREGION_107_L;  //offset 0x308,
   volatile unsigned long ulREGION_107_H;  //offset 0x30C,
   volatile unsigned long ulREGION_108_L;  //offset 0x300,
   volatile unsigned long ulREGION_108_H;  //offset 0x304,
   volatile unsigned long ulREGION_109_L;  //offset 0x300,
   volatile unsigned long ulREGION_109_H;  //offset 0x304,
   volatile unsigned long ulREGION_110_L;  //offset 0x300,
   volatile unsigned long ulREGION_110_H;  //offset 0x304,
   volatile unsigned long ulREGION_111_L;  //offset 0x300,
   volatile unsigned long ulREGION_111_H;  //offset 0x304,
   volatile unsigned long ulREGION_112_L;  //offset 0x300,
   volatile unsigned long ulREGION_112_H;  //offset 0x304,
   volatile unsigned long ulREGION_113_L;  //offset 0x300,
   volatile unsigned long ulREGION_113_H;  //offset 0x304,
   volatile unsigned long ulREGION_114_L;  //offset 0x300,
   volatile unsigned long ulREGION_114_H;  //offset 0x304,
   volatile unsigned long ulREGION_115_L;  //offset 0x300,
   volatile unsigned long ulREGION_115_H;  //offset 0x304,
   volatile unsigned long ulREGION_116_L;  //offset 0x300,
   volatile unsigned long ulREGION_116_H;  //offset 0x304,
   volatile unsigned long ulREGION_117_L;  //offset 0x300,
   volatile unsigned long ulREGION_117_H;  //offset 0x304,
   volatile unsigned long ulREGION_118_L;  //offset 0x300,
   volatile unsigned long ulREGION_118_H;  //offset 0x304,
   volatile unsigned long ulREGION_119_L;  //offset 0x300,
   volatile unsigned long ulREGION_119_H;  //offset 0x304,
   volatile unsigned long ulREGION_120_L;  //offset 0x300,
   volatile unsigned long ulREGION_120_H;  //offset 0x304,
   volatile unsigned long ulREGION_121_L;  //offset 0x300,
   volatile unsigned long ulREGION_121_H;  //offset 0x304,
   volatile unsigned long ulREGION_122_L;  //offset 0x300,
   volatile unsigned long ulREGION_122_H;  //offset 0x304,
   volatile unsigned long ulREGION_123_L;  //offset 0x300,
   volatile unsigned long ulREGION_123_H;  //offset 0x304,
   volatile unsigned long ulREGION_124_L;  //offset 0x300,
   volatile unsigned long ulREGION_124_H;  //offset 0x304,
}
OMAP2420_L4AP_REGS, *pL4APREGS;   

//
// L4IA Registers
//

typedef struct __L4IAREGS__
{
   volatile unsigned long ulCOMPONENT;      //offset 00,logs info abt revision code & interconnect code 
   unsigned long ulRESERVED_1[7];
   volatile unsigned long ulAGENT_CONTROL;  //offset 0x20,L4 IA agent control 
   unsigned long ulRESERVED_0x24;
   volatile unsigned long ulAGENT_STATUS;   //offset 0x28,agent status
   unsigned long ulRESERVED_2[11];
   volatile unsigned long ulERROR_LOG;       //offset 0x58,Error log
}
OMAP2420_L4IA_REGS, *pL4IAREGS;


//
// L4LA Registers
//

typedef struct __L4LAREGS__
{
   volatile unsigned long ulCOMPONENT;   //offset 0x0, intercnt code & rev code
   unsigned long ulRESERVED_1[4];
   volatile unsigned long ulNETWORK;     //offset 0x14,vendor code information
   volatile unsigned long ulINITIATOR_INFO_L; //offset 0x18,req info perm config for region0-LSBs
   volatile unsigned long ulINITIATOR_INFO_H; //offset 0x1C,read perm config for region0-MSBs
   volatile unsigned long ulNET_CONTROL_L;  //offset 0x20, network control information-LSBs
   volatile unsigned long ulNET_CONTROL_H;  //offset 0x24, network control information-MSBs
   unsigned long ulRESERVED_2[54];
   volatile unsigned long ulFLAG_MASK_L; //offset 0x100, mask LSBs
   volatile unsigned long ulFLAG_MASK_H; //offset 0x104, mask MSBs
   unsigned long ulRESERVED_3[2];
   volatile unsigned long ulFLAG_STATUS_L; //offset 0x110, status LSBs  
   volatile unsigned long ulFLAG_STATUS_H; //offset 0x114, status MSBs
}
OMAP2420_L4LA_REGS, *pL4LAREGS;

//
// Base Address macro definition should be included in this header file.
//

// L4TA base address
#define OMAP2420_L4TA_REGS_PA         0x68002400

// TM base addresses
#define OMAP2420_TM4_REGS_PA          0x68002E00  // DSP memory
#define OMAP2420_TM7_REGS_PA          0x68003600  // IVA T
#define OMAP2420_TM5_REGS_PA          0x68003B00  // GFX Subsystem
#define OMAP2420_TM6_REGS_PA          0x68003D00  // Command write
#define OMAP2420_TM1_REGS_PA          0x68004100  // SB2SMS
#define OMAP2420_TM3_REGS_PA          0x68004300  // SB2OCM
#define OMAP2420_TM2_REGS_PA          0x68004500  // SB2GPMC

// L4TAO base addresses
#define OMAP2420_L4TAO1_REGS_PA       0x48001000  // System control and pinout
#define OMAP2420_L4TAO2_REGS_PA       0x48005000  // 32K timer
#define OMAP2420_L4TAO3_REGS_PA       0x48009000  // PRCM
#define OMAP2420_L4TA1_REGS_PA        0x48013000  // Test BCM
#define OMAP2420_L4TA2_REGS_PA        0x48015000  // Test JTAG
#define OMAP2420_L4TA3_REGS_PA        0x4801B000  // Quad GPIO
#define OMAP2420_L4TA4_REGS_PA        0x48023000  // Dual WD timer (1/2)
#define OMAP2420_L4TA5_REGS_PA        0x48025000  // WD timer 3 (DSP)
#define OMAP2420_L4TA6_REGS_PA        0x48027000  // WD timer 4 (IVA)
#define OMAP2420_L4TA7_REGS_PA        0x48029000  // GP timer1
#define OMAP2420_L4TA8_REGS_PA        0x4802B000  // GP timer 2
#define OMAP2420_L4AP_REGS_PA         0x48040000  // Address and protection
#define OMAP2420_L4IA_REGS_PA         0x48040800  // Initiator agent
#define OMAP2420_L4LA_REGS_PA         0x48041000  // Link agent
#define OMAP2420_L4TA9_REGS_PA        0x4804A000  // MPU ETB Emulation/Test
#define OMAP2420_L4TA10_REGS_PA       0x48051000  // DSS
#define OMAP2420_L4TA11_REGS_PA       0x48053000  // Camera
#define OMAP2420_L4TA12_REGS_PA       0x48057000  // sDMA
#define OMAP2420_L4TA13_REGS_PA       0x4805C000  // SSI
#define OMAP2420_L4TAO4_REGS_PA       0x4805F000  // USB OTG
#define OMAP2420_L4TA14_REGS_PA       0x48061000  // Win Tracer Test
#define OMAP2420_L4TA15_REGS_PA       0x48063000  // Win Tracer Test
#define OMAP2420_L4TA16_REGS_PA       0x48065000  // Win Tracer Test
#define OMAP2420_L4TA17_REGS_PA       0x48067000  // Win Tracer Test
#define OMAP2420_L4TA18_REGS_PA       0x48069000  // XTI Test
#define OMAP2420_L4TA19_REGS_PA       0x4806B000  // UART1
#define OMAP2420_L4TA20_REGS_PA       0x4806D000  // UART2
#define OMAP2420_L4TA21_REGS_PA       0x4806F000  // UART3
#define OMAP2420_L4TAO5_REGS_PA       0x48071000  // I2C1
#define OMAP2420_L4TAO6_REGS_PA       0x48073000  // I2C2
#define OMAP2420_L4TAO7_REGS_PA       0x48075000  // McBSP1
#define OMAP2420_L4TAO8_REGS_PA       0x48077000  // McBSP2
#define OMAP2420_L4TA22_REGS_PA       0x48079000  // GP Timer3
#define OMAP2420_L4TA23_REGS_PA       0x4807B000  // GP Timer4
#define OMAP2420_L4TA24_REGS_PA       0x4807D000  // GP Timer5
#define OMAP2420_L4TA25_REGS_PA       0x4807F000  // GP Timer6
#define OMAP2420_L4TA26_REGS_PA       0x48081000  // GP Timer7
#define OMAP2420_L4TA27_REGS_PA       0x48083000  // GP Timer8
#define OMAP2420_L4TA28_REGS_PA       0x48085000  // GP Timer9
#define OMAP2420_L4TA29_REGS_PA       0x48087000  // GP Timer10
#define OMAP2420_L4TA30_REGS_PA       0x48089000  // GP Timer11
#define OMAP2420_L4TA31_REGS_PA       0x4808B000  // GP Timer12
#define OMAP2420_L4TA32_REGS_PA       0x48091000  // EAC
#define OMAP2420_L4TA33_REGS_PA       0x48093000  // FAC
#define OMAP2420_L4TA34_REGS_PA       0x48095000  // IPC
#define OMAP2420_L4TA35_REGS_PA       0x48099000  // SPI1
#define OMAP2420_L4TA36_REGS_PA       0x4809B000  // SPI2
#define OMAP2420_L4TAO9_REGS_PA       0x4809D000  // MMC SDIO
#define OMAP2420_L4TAO10_REGS_PA      0x4809F000  // Reserved
#define OMAP2420_L4TAO11_REGS_PA      0x480A1000  // RNG
#define OMAP2420_L4TAO12_REGS_PA      0x480A3000  // DES3DES
#define OMAP2420_L4TAO13_REGS_PA      0x480A5000  // SHA1MD5
#define OMAP2420_L4TA37_REGS_PA       0x480A7000  // AES
#define OMAP2420_L4TA38_REGS_PA       0x480AA000  // PKA
#define OMAP2420_L4TAO14_REGS_PA      0x480B1000  // Reserved
#define OMAP2420_L4TA39_REGS_PA       0x480B3000  // HDQ/1-Wire

#endif