📄 ioctl.c
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//
// Copyright (c) Special Computing. All rights reserved.
// Copyright (c) Microsoft Corporation. All rights reserved.
//
//------------------------------------------------------------------------------
//
// File: ioctl.c
//
// This file implements the OEM's IO Control (IOCTL) functions and declares
// global variables used by the IOCTL component.
//
#include <bsp.h>
#include <ceddkex.h>
#include "kerneli2c.h"
//------------------------------------------------------------------------------
//
// Global: g_oalIoctlPlatformType/OEM
//
// Platform Type/OEM
//
LPCWSTR g_oalIoCtlPlatformType = L"OMAP3530";
LPCWSTR g_oalIoCtlPlatformOEM = L"BeagleBoard";
//------------------------------------------------------------------------------
//
// Global: g_oalIoctlProcessorVendor/Name/Core
//
// Processor information
//
LPCWSTR g_oalIoCtlProcessorVendor = L"Texas Instruments Inc";
LPCWSTR g_oalIoCtlProcessorName = L"OMAP3530";
LPCWSTR g_oalIoCtlProcessorCore = L"Cortex-A8";
//------------------------------------------------------------------------------
//
// Global: g_oalIoCtlVendorId
//
// This is part of device UUID assigned vendor by Microsoft. See comments in
// platform\common\src\ARM\TI\omap2420\ioctl\deviceid.c code.
//
const UINT8 g_oalIoCtlVendorId[6] = { 0x00, 0x50, 0xBF, 0x43, 0x39, 0xBF };
// Global: g_oalIoctlInstructionSet/ClockSpeed
//
// Processor instruction set identifier and maximal CPU speed
//
UINT32 g_oalIoCtlInstructionSet = 0;
UINT32 g_oalIoCtlClockSpeed = 100; //400;
//------------------------------------------------------------------------------
//
// Function: OALIoCtlHalQueryFormatPartition
//
BOOL OALIoCtlHalQueryFormatPartition(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize
) {
BOOL rc = FALSE;
// Check buffer size
if (pOutSize != NULL) *pOutSize = sizeof(BOOL);
if (pOutBuffer == NULL || outSize < sizeof(BOOL)) {
NKSetLastError(ERROR_INSUFFICIENT_BUFFER);
OALMSG(OAL_WARN, (L"WARN: OALIoCtlHalQueryFormatPartition: "
L"Buffer too small\r\n"
));
goto cleanUp;
}
//// Check if the right softkey is pressed
//if (ReadKeyPad() & KEY_TSOFT2) {
// OALMSG(TRUE, (L"INFO: TSOFT2 key pressed - erase TFAT\r\n"));
// *(BOOL*)pOutBuffer = TRUE;
//} else {
*(BOOL*)pOutBuffer = FALSE;
//}
rc = TRUE;
cleanUp:
return rc;
}
BOOL OALIoctlQueryDisplaySettings(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
RETAILMSG(1, (L"OALIoctlQueryDisplaySettings\r\n"));
if ( (!pOutBuffer) || (outSize < 3*sizeof(DWORD)) )
{
RETAILMSG(1, (L"OALIoctlQueryDisplaySettings: Invalid parameter\r\n"));
return FALSE;
}
((DWORD*)pOutBuffer)[0] = 240; //preferred width
((DWORD*)pOutBuffer)[1] = 320; //preferred height
((DWORD*)pOutBuffer)[2] = 16; //color depth in bits per pixel
*pOutSize = 3 * sizeof(DWORD);
return TRUE;
}
BOOL OALIoCtlHalGetHiveCleanFlag(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
DWORD *pdwFlags;
BOOL *pfClean;
BSP_ARGS *g_pBSPArgs = (BSP_ARGS *) OALArgsQuery(BSP_ARGS_QUERY);
if ((!pInpBuffer) || (inpSize != sizeof(DWORD))
|| (!pOutBuffer) || (outSize != sizeof(BOOL)))
{
RETAILMSG(1, (L"Invalid parameter\r\n"));
return FALSE;
}
pdwFlags = (DWORD *)pInpBuffer;
pfClean = (BOOL *)pOutBuffer;
*pfClean = ((g_pBSPArgs->cleanhive==FALSE)?FALSE:TRUE);
return TRUE;
}
BOOL OalIoctlKernelI2CSubmit(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
/* kernel preemptible here */
DWORD *pParams = (DWORD *)pInpBuffer;
if ((!pParams) || (inpSize!=2*sizeof(DWORD)))
{
RETAILMSG(1, (TEXT("OalIoctlKernelI2CSubmit: input buffer incorrect.\r\n")));
return FALSE;
}
if ((!pOutBuffer) || (outSize!=sizeof(I2CTRANS)))
{
RETAILMSG(1, (TEXT("OalIoctlKernelI2CSubmit: output buffer incorrect.\r\n")));
return FALSE;
}
*pOutSize = sizeof(I2CTRANS);
KERNELI2C_PreemptibleSubmit(pParams[0], pParams[1], (I2CTRANS *)pOutBuffer);
/* the *call* succeeds. if the transaction failed, then the trans errcode will
be nonzero */
return TRUE;
}
static OMAP3_CM_CORE_REGS *gpCMRegs;
BOOL OALIoctlPostInit(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
RETAILMSG(1, (TEXT("OALIoctlPostInit\r\n")));
/* memory is available now. we can init critical sections, etc */
KERNELI2C_HalPostInit();
gpCMRegs = (OMAP3_CM_CORE_REGS *)OALPAtoUA(OMAP3_CM_CORE_REGS_PA);
return TRUE;
}
/* kernel sleep for preemptible threads */
//extern VOID SC_Sleep(DWORD ms);
BOOL OALIoctlICLK1_Enable(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
BOOL saveInts,doEnableWait;
DWORD toUse,ret;
if ((!pInpBuffer) || (inpSize!=sizeof(DWORD)))
{
RETAILMSG(1, (TEXT("OALIoctlICLK1_Enable: input buffer incorrect.\r\n")));
return FALSE;
}
if ((pOutBuffer) && (outSize!=sizeof(DWORD)))
{
RETAILMSG(1, (TEXT("OALIoctlICLK1_Enable: output buffer incorrect.\r\n")));
return FALSE;
}
//TBD:
toUse = (*((DWORD *)pInpBuffer)) & 0xFFFFFFF9;
if (!toUse)
{
RETAILMSG(1, (TEXT("OALIoctlICLK1_Enable: invalid bit set or no bits set.\r\n")));
return FALSE;
}
/* now lock everyone who may want to change the reg (even ISRs, which can) */
doEnableWait = FALSE;
saveInts = INTERRUPTS_ENABLE(FALSE);
/* the cheese stands alone */
ret = gpCMRegs->ulICLKEN1;
ret |= toUse;
gpCMRegs->ulICLKEN1 = ret;
if (gpCMRegs->ulFCLKEN1 & toUse)
doEnableWait = TRUE;
INTERRUPTS_ENABLE(saveInts);
//TBD:
if ((doEnableWait) && (toUse & 0x7FFFFFF9))
{
/* make sure enabled module can be accessed (both clocks are on now) */
while (!(gpCMRegs->ulIDLEST1 & toUse))
{
//cc if (saveInts)
//cc SC_Sleep(0); /* if we turned off/reenabled interrupts, then we are preemptible */
}
}
if (pOutBuffer)
{
*((DWORD *)pOutBuffer) = ret;
*pOutSize = sizeof(DWORD);
}
else
*pOutSize = 0;
return TRUE;
}
BOOL OALIoctlICLK1_Disable(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
BOOL saveInts;
DWORD toUse,ret;
if ((!pInpBuffer) || (inpSize!=sizeof(DWORD)))
{
RETAILMSG(1, (TEXT("OALIoctlICLK1_Disable: input buffer incorrect.\r\n")));
return FALSE;
}
if ((pOutBuffer) && (outSize!=sizeof(DWORD)))
{
RETAILMSG(1, (TEXT("OALIoctlICLK1_Disable: output buffer incorrect.\r\n")));
return FALSE;
}
toUse = (*((DWORD *)pInpBuffer)) & 0xFFFFFFF9;
if (!toUse)
{
RETAILMSG(1, (TEXT("OALIoctlICLK1_Disable: invalid bit set or no bits set.\r\n")));
return FALSE;
}
/* now lock everyone who may want to change the reg (even ISRs, which can) */
saveInts = INTERRUPTS_ENABLE(FALSE);
/* the cheese stands alone */
ret = gpCMRegs->ulICLKEN1;
ret &= ~toUse;
gpCMRegs->ulICLKEN1 = ret;
INTERRUPTS_ENABLE(saveInts);
if (pOutBuffer)
{
*((DWORD *)pOutBuffer) = ret;
*pOutSize = sizeof(DWORD);
}
else
*pOutSize = 0;
return TRUE;
}
BOOL OALIoctlFCLK1_Enable(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
// BOOL saveInts,doEnableWait;
//DWORD toUse,ret;
//if ((!pInpBuffer) || (inpSize!=sizeof(DWORD)))
//{
// RETAILMSG(1, (TEXT("OALIoctlFCLK1_Enable: input buffer incorrect.\r\n")));
// return FALSE;
//}
//if ((pOutBuffer) && (outSize!=sizeof(DWORD)))
//{
// RETAILMSG(1, (TEXT("OALIoctlFCLK1_Enable: output buffer incorrect.\r\n")));
// return FALSE;
//}
//toUse = (*((DWORD *)pInpBuffer)) & 0xBFFFFFFF;
//if (!toUse)
//{
// RETAILMSG(1, (TEXT("OALIoctlFCLK1_Enable: invalid bit set or no bits set.\r\n")));
// return FALSE;
//}
///* now lock everyone who may want to change the reg (even ISRs, which can) */
//doEnableWait = FALSE;
//saveInts = INTERRUPTS_ENABLE(FALSE);
///* the cheese stands alone */
//ret = gpPRCMRegs->ulCM_FCLKEN1_CORE;
//ret |= toUse;
//gpPRCMRegs->ulCM_FCLKEN1_CORE = ret;
//if (gpPRCMRegs->ulCM_ICLKEN1_CORE & toUse)
// doEnableWait = TRUE;
//INTERRUPTS_ENABLE(saveInts);
//if ((doEnableWait) && (toUse & 0x7FFFFFF9))
//{
// /* make sure enabled module can be accessed */
// while (!(gpPRCMRegs->ulCM_IDLEST1_CORE & toUse))
// {
// //cc if (saveInts)
// //cc SC_Sleep(0); /* if we turned off/reenabled interrupts, then we are preemptible */
// }
//}
//if (pOutBuffer)
//{
// *((DWORD *)pOutBuffer) = ret;
// *pOutSize = sizeof(DWORD);
//}
//else
// *pOutSize = 0;
return TRUE;
}
BOOL OALIoctlFCLK1_Disable(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
// BOOL saveInts;
//DWORD toUse,ret;
//if ((!pInpBuffer) || (inpSize!=sizeof(DWORD)))
//{
// RETAILMSG(1, (TEXT("OALIoctlFCLK1_Disable: input buffer incorrect.\r\n")));
// return FALSE;
//}
//if ((pOutBuffer) && (outSize!=sizeof(DWORD)))
//{
// RETAILMSG(1, (TEXT("OALIoctlFCLK1_Disable: output buffer incorrect.\r\n")));
// return FALSE;
//}
//toUse = (*((DWORD *)pInpBuffer)) & 0xFFFFFFFF;
//if (!toUse)
//{
// RETAILMSG(1, (TEXT("OALIoctlFCLK1_Disable: invalid bit set or no bits set.\r\n")));
// return FALSE;
//}
///* now lock everyone who may want to change the reg (even ISRs, which can) */
//saveInts = INTERRUPTS_ENABLE(FALSE);
///* the cheese stands alone */
//ret = gpPRCMRegs->ulCM_FCLKEN1_CORE;
//ret &= ~toUse;
//gpPRCMRegs->ulCM_FCLKEN1_CORE = ret;
//INTERRUPTS_ENABLE(saveInts);
//if (pOutBuffer)
//{
// *((DWORD *)pOutBuffer) = ret;
// *pOutSize = sizeof(DWORD);
//}
//else
// *pOutSize = 0;
return TRUE;
}
BOOL OALIoctlAIDLE1_Enable(
UINT32 code, VOID *pInpBuffer, UINT32 inpSize, VOID *pOutBuffer,
UINT32 outSize, UINT32 *pOutSize)
{
// BOOL saveInts;
//DWORD toUse,ret;
//if ((!pInpBuffer) || (inpSize!=sizeof(DWORD)))
//{
// RETAILMSG(1, (TEXT("OALIoctlAIDLE1_Enable: input buffer incorrect.\r\n")));
// return FALSE;
//}
//if ((pOutBuffer) && (outSize!=sizeof(DWORD)))
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