cache_builder.cc
来自「linux下基于c++的处理器仿真平台。具有处理器流水线」· CC 代码 · 共 446 行 · 第 1/2 页
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prefetch_serial_squash, \ prefetch_cache_check_push, \ prefetch_degree, \ prefetch_latency, \ prefetch_use_cpu_id); \ } \ else if (pf_policy == "ghb") { \ pf = new \ GHBPrefetcher<CacheTags<t, comp>, b>(prefetcher_size, \ !prefetch_past_page, \ prefetch_serial_squash, \ prefetch_cache_check_push, \ prefetch_degree, \ prefetch_latency, \ prefetch_use_cpu_id); \ } \ else { */\ pf = new \ TaggedPrefetcher<CacheTags<t, comp>, b>(prefetcher_size, \ !prefetch_past_page, \ prefetch_serial_squash, \ prefetch_cache_check_push, \ prefetch_data_accesses_only, \ prefetch_degree, \ prefetch_latency); \/* }*/ \ Cache<CacheTags<t, comp>, b, c>::Params params(tagStore, mq, coh, \ do_copy, base_params, \ in_bus, out_bus, pf, \ prefetch_access); \ Cache<CacheTags<t, comp>, b, c> *retval = \ new Cache<CacheTags<t, comp>, b, c>(getInstanceName(), hier, \ params); \ if (in_bus == NULL) { \ retval->setSlaveInterface(new MemoryInterface<Cache<CacheTags<t, comp>, b, c> >(getInstanceName(), hier, retval, mem_trace)); \ } else { \ retval->setSlaveInterface(new SlaveInterface<Cache<CacheTags<t, comp>, b, c>, Bus>(getInstanceName(), hier, retval, in_bus, mem_trace)); \ } \ retval->setMasterInterface(new MasterInterface<Cache<CacheTags<t, comp>, b, c>, Bus>(getInstanceName(), hier, retval, out_bus)); \ out_bus->rangeChange(); \ return retval; \ } while (0)#define BUILD_CACHE_PANIC(x) do { \ panic("%s not compiled into M5", x); \ } while (0)#if defined(USE_LZSS_COMPRESSION)#define BUILD_COMPRESSED_CACHE(TAGS, tags, b, c) do { \ if (compressed_bus || store_compressed){ \ CacheTags<TAGS, LZSSCompression> *tagStore = \ new CacheTags<TAGS, LZSSCompression>(tags, \ compression_latency, \ true, store_compressed, \ adaptive_compression, \ prefetch_miss); \ BUILD_CACHE(TAGS, LZSSCompression, b, c); \ } else { \ CacheTags<TAGS, NullCompression> *tagStore = \ new CacheTags<TAGS, NullCompression>(tags, \ compression_latency, \ true, store_compressed, \ adaptive_compression, \ prefetch_miss); \ BUILD_CACHE(TAGS, NullCompression, b, c); \ } \ } while (0)#else#define BUILD_COMPRESSED_CACHE(TAGS, tags, b, c) do { \ if (compressed_bus || store_compressed){ \ BUILD_CACHE_PANIC("compressed caches"); \ } else { \ CacheTags<TAGS, NullCompression> *tagStore = \ new CacheTags<TAGS, NullCompression>(tags, \ compression_latency, \ true, store_compressed, \ adaptive_compression \ prefetch_miss); \ BUILD_CACHE(TAGS, NullCompression, b, c); \ } \ } while (0)#endif#if defined(USE_CACHE_FALRU)#define BUILD_FALRU_CACHE(b,c) do { \ FALRU *tags = new FALRU(block_size, size, latency); \ BUILD_COMPRESSED_CACHE(FALRU, tags, b, c); \ } while (0)#else#define BUILD_FALRU_CACHE(b, c) BUILD_CACHE_PANIC("falru cache")#endif#if defined(USE_CACHE_LRU)#define BUILD_LRU_CACHE(b, c) do { \ LRU *tags = new LRU(numSets, block_size, assoc, latency); \ BUILD_COMPRESSED_CACHE(LRU, tags, b, c); \ } while (0)#else#define BUILD_LRU_CACHE(b, c) BUILD_CACHE_PANIC("lru cache")#endif#if defined(USE_CACHE_SPLIT)#define BUILD_SPLIT_CACHE(b, c) do { \ Split *tags = new Split(numSets, block_size, assoc, split_size, lifo, \ two_queue, latency); \ BUILD_COMPRESSED_CACHE(Split, tags, b, c); \ } while (0)#else#define BUILD_SPLIT_CACHE(b, c) BUILD_CACHE_PANIC("split cache")#endif#if defined(USE_CACHE_SPLIT_LIFO)#define BUILD_SPLIT_LIFO_CACHE(b, c) do { \ SplitLIFO *tags = new SplitLIFO(block_size, size, assoc, \ latency, two_queue, -1); \ BUILD_COMPRESSED_CACHE(SplitLIFO, tags, b, c); \ } while (0)#else#define BUILD_SPLIT_LIFO_CACHE(b, c) BUILD_CACHE_PANIC("lifo cache")#endif#if defined(USE_CACHE_IIC)#define BUILD_IIC_CACHE(b ,c) do { \ IIC *tags = new IIC(iic_params); \ BUILD_COMPRESSED_CACHE(IIC, tags, b, c); \ } while (0)#else#define BUILD_IIC_CACHE(b, c) BUILD_CACHE_PANIC("iic")#endif#define BUILD_CACHES(b, c) do { \ if (repl == NULL) { \ if (numSets == 1) { \ BUILD_FALRU_CACHE(b, c); \ } else { \ if (split == true) { \ BUILD_SPLIT_CACHE(b, c); \ } else if (lifo == true) { \ BUILD_SPLIT_LIFO_CACHE(b, c); \ } else { \ BUILD_LRU_CACHE(b, c); \ } \ } \ } else { \ BUILD_IIC_CACHE(b, c); \ } \ } while (0)#define BUILD_COHERENCE(b) do { \ if (protocol == NULL) { \ UniCoherence *coh = new UniCoherence(); \ BUILD_CACHES(b, UniCoherence); \ } else { \ SimpleCoherence *coh = new SimpleCoherence(protocol); \ BUILD_CACHES(b, SimpleCoherence); \ } \ } while (0)CREATE_SIM_OBJECT(BaseCache){ string name = getInstanceName(); int numSets = size / (assoc * block_size); string pf_policy = prefetch_policy; if (subblock_size == 0) { subblock_size = block_size; } // Build BaseCache param object BaseCache::Params base_params(addr_range, latency, block_size, max_miss_count); //Warnings about prefetcher policy if (pf_policy == "none" && (prefetch_miss || prefetch_access)) { panic("With no prefetcher, you shouldn't prefetch from" " either miss or access stream\n"); } if ((pf_policy == "tagged" || pf_policy == "stride" || pf_policy == "ghb") && !(prefetch_miss || prefetch_access)) { warn("With this prefetcher you should chose a prefetch" " stream (miss or access)\nNo Prefetching will occur\n"); } if ((pf_policy == "tagged" || pf_policy == "stride" || pf_policy == "ghb") && prefetch_miss && prefetch_access) { panic("Can't do prefetches from both miss and access" " stream\n"); } if (pf_policy != "tagged" && pf_policy != "stride" && pf_policy != "ghb" && pf_policy != "none") { panic("Unrecognized form of a prefetcher: %s, try using" "['none','stride','tagged','ghb']\n", pf_policy); }#if defined(USE_CACHE_IIC) // Build IIC params IIC::Params iic_params; iic_params.size = size; iic_params.numSets = numSets; iic_params.blkSize = block_size; iic_params.assoc = assoc; iic_params.hashDelay = hash_delay; iic_params.hitLatency = latency; iic_params.rp = repl; iic_params.subblockSize = subblock_size;#else const void *repl = NULL;#endif if (mshrs == 1 || out_bus->doEvents() == false) { BlockingBuffer *mq = new BlockingBuffer(true); BUILD_COHERENCE(BlockingBuffer); } else { MissQueue *mq = new MissQueue(mshrs, tgts_per_mshr, write_buffers, true, prefetch_miss); BUILD_COHERENCE(MissQueue); } return NULL;}REGISTER_SIM_OBJECT("BaseCache", BaseCache)#endif //DOXYGEN_SHOULD_SKIP_THIS
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