m5stats.txt

linux下基于c++的处理器仿真平台。具有处理器流水线

---------- Begin Simulation Statistics ----------
cpu.COM:IPB                                  6.177777                       # Committed instructions per branch
cpu.COM:IPB_0                                6.174517                       # Committed instructions per branch
cpu.COM:IPB_1                                6.187812                       # Committed instructions per branch
cpu.COM:IPC                                  2.155084                       # Committed instructions per cycle
cpu.COM:IPC_0                                1.625686                       # Committed instructions per cycle
cpu.COM:IPC_1                                0.529398                       # Committed instructions per cycle
cpu.COM:branches                               214583                       # Number of branches committed
cpu.COM:branches_0                             161956                       # Number of branches committed
cpu.COM:branches_1                              52627                       # Number of branches committed
cpu.COM:bw_lim_avg                            21.5798                       # Avg number not committed in cycles BW limited
cpu.COM:bw_lim_avg_0                          13.5457                       # Avg number not committed in cycles BW limited
cpu.COM:bw_lim_avg_1                           8.0340                       # Avg number not committed in cycles BW limited
cpu.COM:bw_lim_events                           40431                       # number cycles where commit BW limit reached
cpu.COM:bw_lim_rate                            1.4184                       # Average number not committed due to BW (over all cycles)
cpu.COM:bw_lim_rate_0                          0.8903                       # Average number not committed due to BW (over all cycles)
cpu.COM:bw_lim_rate_1                          0.5281                       # Average number not committed due to BW (over all cycles)
cpu.COM:bw_lim_stdev_0_mean                   13.5457                       # standard deviation of bw_lim_avg value
cpu.COM:bw_lim_stdev_0_stdev                  14.4791                       # standard deviation of bw_lim_avg value
**Ignore: cpu.COM:bw_lim_stdev_0_TOT       40431.0000                       # standard deviation of bw_lim_avg value
cpu.COM:bw_lim_stdev_1_mean                    8.0340                       # standard deviation of bw_lim_avg value
cpu.COM:bw_lim_stdev_1_stdev                  20.0407                       # standard deviation of bw_lim_avg value
**Ignore: cpu.COM:bw_lim_stdev_1_TOT       40431.0000                       # standard deviation of bw_lim_avg value
cpu.COM:bw_limited                             872491                       # number of insts not committed due to BW limits
cpu.COM:bw_limited_0                           547667                       # number of insts not committed due to BW limits
cpu.COM:bw_limited_1                           324824                       # number of insts not committed due to BW limits
cpu.COM:committed_per_cycle.start_dist                         # Number of insts commited each cycle
cpu.COM:committed_per_cycle.samples            327796                      
cpu.COM:committed_per_cycle.min_value               0                      
                               0         3395    103.57%           
                               1        82423   2514.46%           
                               2        58547   1786.08%           
                               3        30471    929.57%           
                               4        27859    849.89%           
                               5        11958    364.80%           
                               6        15090    460.35%           
                               7         9357    285.45%           
                               8        88696   2705.83%           
cpu.COM:committed_per_cycle.max_value               8                      
cpu.COM:committed_per_cycle.end_dist

cpu.COM:count                                 1325646                       # Number of instructions committed
cpu.COM:count_0                               1000000                       # Number of instructions committed
cpu.COM:count_1                                325646                       # Number of instructions committed
cpu.COM:loads                                  377908                       # Number of loads committed
cpu.COM:loads_0                                297370                       # Number of loads committed
cpu.COM:loads_1                                 80538                       # Number of loads committed
cpu.COM:membars                                     0                       # Number of memory barriers committed
cpu.COM:membars_0                                   0                       # Number of memory barriers committed
cpu.COM:membars_1                                   0                       # Number of memory barriers committed
cpu.COM:refs                                   511043                       # Number of memory references committed
cpu.COM:refs_0                                 392508                       # Number of memory references committed
cpu.COM:refs_1                                 118535                       # Number of memory references committed
cpu.COM:stores                                 133135                       # Number of stores committed
cpu.COM:stores_0                                95138                       # Number of stores committed
cpu.COM:stores_1                                37997                       # Number of stores committed
cpu.COM:swp_count                                2117                       # Number of s/w prefetches committed
cpu.COM:swp_count_0                              1316                       # Number of s/w prefetches committed
cpu.COM:swp_count_1                               801                       # Number of s/w prefetches committed
cpu.DDQ:count                                89498340                       # cum count of instructions
cpu.DDQ:count_0                              59977303                       # cum count of instructions
cpu.DDQ:count_1                              29521037                       # cum count of instructions
cpu.DDQ:rate                                      145                       # average number of instructions
cpu.DDQ:rate_0                                     98                       # average number of instructions
cpu.DDQ:rate_1                                     48                       # average number of instructions
cpu.DIS:chain_creation.start_dist
     Inst has no outstanding IDEPS            0      0.00%            # Reason that chain head was created
      IDEP chain reached max depth            0      0.00%            # Reason that chain head was created
                    Inst is a load            0      0.00%            # Reason that chain head was created
  Chain has multiple chained IDEPS            0      0.00%            # Reason that chain head was created
cpu.DIS:chain_creation.end_dist
cpu.DIS:chain_head_frac                             0                       # fraction of insts that are chain heads
cpu.DIS:chain_head_frac_0                           0                       # fraction of insts that are chain heads
cpu.DIS:chain_head_frac_1                           0                       # fraction of insts that are chain heads
cpu.DIS:chain_heads                                 0                       # number insts that are chain heads
cpu.DIS:chain_heads_0                               0                       # number insts that are chain heads
cpu.DIS:chain_heads_1                               0                       # number insts that are chain heads
cpu.DIS:chains_insuf                                0                       # number of times thread had insuf chains
cpu.DIS:chains_insuf_0                              0                       # number of times thread had insuf chains
cpu.DIS:chains_insuf_1                              0                       # number of times thread had insuf chains
cpu.DIS:chains_insuf_rate                           0                       # rate that thread had insuf chains
cpu.DIS:chains_insuf_rate_0                         0                       # rate that thread had insuf chains
cpu.DIS:chains_insuf_rate_1                         0                       # rate that thread had insuf chains
cpu.DIS:count                                 1994687                       # cumulative count of dispatched insts
cpu.DIS:count_0                               1433668                       # cumulative count of dispatched insts
cpu.DIS:count_1                                561019                       # cumulative count of dispatched insts
cpu.DIS:insufficient_chains                         0                       # Number of instances where dispatch stopped
cpu.DIS:mod_n_stall_avg_free                 no value                       # avg free slots per cycle
cpu.DIS:mod_n_stall_avg_free_0               no value                       # avg free slots per cycle
cpu.DIS:mod_n_stall_avg_free_1               no value                       # avg free slots per cycle
cpu.DIS:mod_n_stall_frac                            0                       # avg stalls per cycle
cpu.DIS:mod_n_stall_frac_0                          0                       # avg stalls per cycle
cpu.DIS:mod_n_stall_frac_1                          0                       # avg stalls per cycle
cpu.DIS:mod_n_stall_free                            0                       # free slots when dispatch stalled due to mod-n
cpu.DIS:mod_n_stall_free_0                          0                       # free slots when dispatch stalled due to mod-n
cpu.DIS:mod_n_stall_free_1                          0                       # free slots when dispatch stalled due to mod-n
cpu.DIS:mod_n_stalls                                0                       # cycles where dispatch stalled due to mod-n
cpu.DIS:mod_n_stalls_0                              0                       # cycles where dispatch stalled due to mod-n
cpu.DIS:mod_n_stalls_1                              0                       # cycles where dispatch stalled due to mod-n
cpu.DIS:one_rdy_insts                               0                       # number of 2-op insts w/ one rdy op
cpu.DIS:one_rdy_insts_0                             0                       # number of 2-op insts w/ one rdy op
cpu.DIS:one_rdy_insts_1                             0                       # number of 2-op insts w/ one rdy op
cpu.DIS:one_rdy_ratio                        no value                       # fraction of 2-op insts w/ one ready op
cpu.DIS:one_rdy_ratio_0                      no value                       # fraction of 2-op insts w/ one ready op
cpu.DIS:one_rdy_ratio_1                      no value                       # fraction of 2-op insts w/ one ready op
cpu.DIS:op_count                              2762181                       # number of operations dispatched
cpu.DIS:op_count_0                            1994446                       # number of operations dispatched
cpu.DIS:op_count_1                             767735                       # number of operations dispatched
cpu.DIS:op_rate                              4.490439                       # dispatched operations per cycle
cpu.DIS:op_rate_0                            3.242343                       # dispatched operations per cycle
cpu.DIS:op_rate_1                            1.248096                       # dispatched operations per cycle
cpu.DIS:rate                                 3.242734                       # dispatched_insts per cycle
cpu.DIS:rate_0                               2.330694                       # dispatched_insts per cycle
cpu.DIS:rate_1                               0.912041                       # dispatched_insts per cycle
cpu.DIS:second_choice_clust                         0                       # Number of instructions dispatched to second-choice cluster
cpu.DIS:second_choice_stall                         0                       # Number of instructions stalled when first choice not available
cpu.DIS:serialize_stall_cycles                      0                       # count of cycles dispatch stalled for serializing inst
cpu.DIS:serialize_stall_cycles_0                    0                       # count of cycles dispatch stalled for serializing inst
cpu.DIS:serialize_stall_cycles_1                    0                       # count of cycles dispatch stalled for serializing inst
cpu.DIS:serializing_insts                           0                       # count of serializing insts dispatched
cpu.DIS:serializing_insts_0                         0                       # count of serializing insts dispatched
cpu.DIS:serializing_insts_1                         0                       # count of serializing insts dispatched
cpu.DIS:two_input_insts                             0                       # Number of two input instructions queued
cpu.DIS:two_input_insts_0                           0                       # Number of two input instructions queued
cpu.DIS:two_input_insts_1                           0                       # Number of two input instructions queued
cpu.DIS:two_input_ratio                             0                       # fraction of all insts having 2 inputs
cpu.DIS:two_input_ratio_0                           0                       # fraction of all insts having 2 inputs
cpu.DIS:two_input_ratio_1                           0                       # fraction of all insts having 2 inputs
cpu.FETCH:branch_count                         424815                       # Number of branches fetched
cpu.FETCH:branch_count_0                       296694                       # Number of branches fetched
cpu.FETCH:branch_count_1                       128121                       # Number of branches fetched
cpu.FETCH:branch_rate                        0.690616                       # Number of branch fetches per cycle
cpu.FETCH:branch_rate_0                      0.482331                       # Number of branch fetches per cycle
cpu.FETCH:branch_rate_1                      0.208284                       # Number of branch fetches per cycle
cpu.FETCH:chance_pct_0                       0.708860                       # Percentage of all fetch chances
cpu.FETCH:chance_pct_1                       0.291140                       # Percentage of all fetch chances
cpu.FETCH:chances                              466996                       # Number of fetch opportunities
cpu.FETCH:chances_0                            331035                       # Number of fetch opportunities
cpu.FETCH:chances_1                            135961                       # Number of fetch opportunities
cpu.FETCH:choice                               466996                       # Number of times we fetched from our first choice
cpu.FETCH:choice.start_dist
                               0       466996    100.00%            # Number of times we fetched from our first choice
                               1            0      0.00%            # Number of times we fetched from our first choice
cpu.FETCH:choice.end_dist
cpu.FETCH:count                               3155378                       # Number of instructions fetched
cpu.FETCH:count_0                             2121084                       # Number of instructions fetched
cpu.FETCH:count_1                             1034294                       # Number of instructions fetched
cpu.FETCH:decisions                            466996                       # number of times the fetch stage chose between threads
cpu.FETCH:idle_cycles                          148129                       # number of cycles where fetch stage was idle
cpu.FETCH:idle_icache_blocked_cycles                0                       # number of cycles where fetch was idle due to icache blocked
cpu.FETCH:idle_rate                             24.08                       # percent of cycles fetch stage was idle
cpu.FETCH:prio_changes                              0                       # Number of times priorities were changed
cpu.FETCH:prio_changes_0                            0                       # Number of times priorities were changed
cpu.FETCH:prio_changes_1                            0                       # Number of times priorities were changed
cpu.FETCH:rate                               5.129653                       # Number of inst fetches per cycle
cpu.FETCH:rate_0                             3.448216                       # Number of inst fetches per cycle
cpu.FETCH:rate_1                             1.681437                       # Number of inst fetches per cycle
cpu.FETCH:rate_dist.start_dist                                 # Number of instructions fetched each cycle (Total)
cpu.FETCH:rate_dist.samples                    466996                      
cpu.FETCH:rate_dist.min_value                       0                      
                               0         1943     41.61%           
                               1        17377    372.10%           
                               2        17226    368.87%           
                               3        20269    434.03%           
                               4        16259    348.16%           
                               5        19208    411.31%           
                               6        53243   1140.12%           
                               7         9560    204.71%           
                               8       311911   6679.09%           
cpu.FETCH:rate_dist.max_value                       8                      
cpu.FETCH:rate_dist.end_dist

cpu.FETCH:rate_dist_0.start_dist                               # Number of instructions fetched each cycle (Thread 0)