m5stats.txt

linux下基于c++的处理器仿真平台。具有处理器流水线

cpu.IFQ:qfull_rob_occ_dist_3.samples           374611                      
cpu.IFQ:qfull_rob_occ_dist_3.min_value              0                      
                               0        53814   1436.53%           
                              10        25991    693.81%           
                              20       249038   6647.91%           
                              30        13854    369.82%           
                              40         7102    189.58%           
                              50         6166    164.60%           
                              60         4563    121.81%           
                              70         3774    100.74%           
                              80         1611     43.00%           
                              90         1779     47.49%           
                             100         1032     27.55%           
                             110          840     22.42%           
                             120          797     21.28%           
                             130          837     22.34%           
                             140          517     13.80%           
                             150          484     12.92%           
                             160          507     13.53%           
                             170          429     11.45%           
                             180          799     21.33%           
                             190          677     18.07%           
                             200            0      0.00%           
cpu.IFQ:qfull_rob_occ_dist_3.max_value            196                      
cpu.IFQ:qfull_rob_occ_dist_3.end_dist

cpu.IQ:cap_events                                   0                       # number of cycles where IQ cap was active
cpu.IQ:cap_events_0                                 0                       # number of cycles where IQ cap was active
cpu.IQ:cap_events_1                                 0                       # number of cycles where IQ cap was active
cpu.IQ:cap_events_2                                 0                       # number of cycles where IQ cap was active
cpu.IQ:cap_events_3                                 0                       # number of cycles where IQ cap was active
cpu.IQ:cap_inst                                     0                       # number of instructions held up by IQ cap
cpu.IQ:cap_inst_0                                   0                       # number of instructions held up by IQ cap
cpu.IQ:cap_inst_1                                   0                       # number of instructions held up by IQ cap
cpu.IQ:cap_inst_2                                   0                       # number of instructions held up by IQ cap
cpu.IQ:cap_inst_3                                   0                       # number of instructions held up by IQ cap
cpu.IQ:residence:(null).start_dist                             # cycles from dispatch to issue
cpu.IQ:residence:(null).samples                     0                      
cpu.IQ:residence:(null).min_value                   0                      
                               0            0                      
                               2            0                      
                               4            0                      
                               6            0                      
                               8            0                      
                              10            0                      
                              12            0                      
                              14            0                      
                              16            0                      
                              18            0                      
                              20            0                      
                              22            0                      
                              24            0                      
                              26            0                      
                              28            0                      
                              30            0                      
                              32            0                      
                              34            0                      
                              36            0                      
                              38            0                      
                              40            0                      
                              42            0                      
                              44            0                      
                              46            0                      
                              48            0                      
                              50            0                      
                              52            0                      
                              54            0                      
                              56            0                      
                              58            0                      
                              60            0                      
                              62            0                      
                              64            0                      
                              66            0                      
                              68            0                      
                              70            0                      
                              72            0                      
                              74            0                      
                              76            0                      
                              78            0                      
                              80            0                      
                              82            0                      
                              84            0                      
                              86            0                      
                              88            0                      
                              90            0                      
                              92            0                      
                              94            0                      
                              96            0                      
                              98            0                      
cpu.IQ:residence:(null).max_value                   0                      
cpu.IQ:residence:(null).end_dist

cpu.IQ:residence:IntAlu.start_dist                             # cycles from dispatch to issue
cpu.IQ:residence:IntAlu.samples               2675396                      
cpu.IQ:residence:IntAlu.min_value                   1                      
                               0       738322   2759.67%   2759.67%
                               2       498495   1863.26%   4622.93%
                               4       256951    960.42%   5583.35%
                               6       400334   1496.35%   7079.71%
                               8       204930    765.98%   7845.69%
                              10       148751    556.00%   8401.68%
                              12        96418    360.39%   8762.07%
                              14        65399    244.45%   9006.52%
                              16        47150    176.24%   9182.75%
                              18        32135    120.11%   9302.87%
                              20        24634     92.08%   9394.94%
                              22        22456     83.94%   9478.88%
                              24        15619     58.38%   9537.26%
                              26        12627     47.20%   9584.45%
                              28        11341     42.39%   9626.84%
                              30         8591     32.11%   9658.96%
                              32         6289     23.51%   9682.46%
                              34         4834     18.07%   9700.53%
                              36         4309     16.11%   9716.64%
                              38         3232     12.08%   9728.72%
                              40         3011     11.25%   9739.97%
                              42         3694     13.81%   9753.78%
                              44         3171     11.85%   9765.63%
                              46         2438      9.11%   9774.74%
                              48         2172      8.12%   9782.86%
                              50         1767      6.60%   9789.47%
                              52         1431      5.35%   9794.82%
                              54         1152      4.31%   9799.12%
                              56         1034      3.86%   9802.99%
                              58         1012      3.78%   9806.77%
                              60         1047      3.91%   9810.68%
                              62         1134      4.24%   9814.92%
                              64         1040      3.89%   9818.81%
                              66          811      3.03%   9821.84%
                              68          614      2.29%   9824.13%
                              70          499      1.87%   9826.00%
                              72          496      1.85%   9827.85%
                              74          565      2.11%   9829.97%
                              76          623      2.33%   9832.29%
                              78          511      1.91%   9834.20%
                              80          469      1.75%   9835.96%
                              82          433      1.62%   9837.58%
                              84          419      1.57%   9839.14%
                              86          320      1.20%   9840.34%
                              88          372      1.39%   9841.73%
                              90          334      1.25%   9842.98%
                              92          342      1.28%   9844.25%
                              94          398      1.49%   9845.74%
                              96          397      1.48%   9847.23%
                              98          414      1.55%   9848.77%
cpu.IQ:residence:IntAlu.overflows               40459                      
cpu.IQ:residence:IntAlu.max_value                1011                      
cpu.IQ:residence:IntAlu.end_dist

cpu.IQ:residence:IntMult.start_dist                            # cycles from dispatch to issue
cpu.IQ:residence:IntMult.samples                 6983                      
cpu.IQ:residence:IntMult.min_value                  1                      
                               0         1250   1790.06%   1790.06%
                               2         1420   2033.51%   3823.57%
                               4          546    781.90%   4605.47%
                               6         1881   2693.68%   7299.16%
                               8          748   1071.17%   8370.33%
                              10          458    655.88%   9026.21%
                              12          298    426.75%   9452.96%
                              14          124    177.57%   9630.53%