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📄 m5stats.txt

📁 linux下基于c++的处理器仿真平台。具有处理器流水线
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cpu.DIS:one_rdy_ratio_2                      no value                       # fraction of 2-op insts w/ one ready opcpu.DIS:one_rdy_ratio_3                      no value                       # fraction of 2-op insts w/ one ready opcpu.DIS:op_count                              6159963                       # number of operations dispatchedcpu.DIS:op_count_0                            1421754                       # number of operations dispatchedcpu.DIS:op_count_1                            1431239                       # number of operations dispatchedcpu.DIS:op_count_2                            1787980                       # number of operations dispatchedcpu.DIS:op_count_3                            1518990                       # number of operations dispatchedcpu.DIS:op_rate                              3.467458                       # dispatched operations per cyclecpu.DIS:op_rate_0                            0.800309                       # dispatched operations per cyclecpu.DIS:op_rate_1                            0.805648                       # dispatched operations per cyclecpu.DIS:op_rate_2                            1.006458                       # dispatched operations per cyclecpu.DIS:op_rate_3                            0.855043                       # dispatched operations per cyclecpu.DIS:rate                                 2.553118                       # dispatched_insts per cyclecpu.DIS:rate_0                               0.589505                       # dispatched_insts per cyclecpu.DIS:rate_1                               0.593240                       # dispatched_insts per cyclecpu.DIS:rate_2                               0.741039                       # dispatched_insts per cyclecpu.DIS:rate_3                               0.629334                       # dispatched_insts per cyclecpu.DIS:second_choice_clust                         0                       # Number of instructions dispatched to second-choice clustercpu.DIS:second_choice_stall                         0                       # Number of instructions stalled when first choice not availablecpu.DIS:serialize_stall_cycles                      0                       # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_0                    0                       # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_1                    0                       # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_2                    0                       # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_3                    0                       # count of cycles dispatch stalled for serializing instcpu.DIS:serializing_insts                           0                       # count of serializing insts dispatchedcpu.DIS:serializing_insts_0                         0                       # count of serializing insts dispatchedcpu.DIS:serializing_insts_1                         0                       # count of serializing insts dispatchedcpu.DIS:serializing_insts_2                         0                       # count of serializing insts dispatchedcpu.DIS:serializing_insts_3                         0                       # count of serializing insts dispatchedcpu.DIS:two_input_insts                             0                       # Number of two input instructions queuedcpu.DIS:two_input_insts_0                           0                       # Number of two input instructions queuedcpu.DIS:two_input_insts_1                           0                       # Number of two input instructions queuedcpu.DIS:two_input_insts_2                           0                       # Number of two input instructions queuedcpu.DIS:two_input_insts_3                           0                       # Number of two input instructions queuedcpu.DIS:two_input_ratio                             0                       # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_0                           0                       # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_1                           0                       # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_2                           0                       # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_3                           0                       # fraction of all insts having 2 inputscpu.FETCH:branch_count                         797317                       # Number of branches fetchedcpu.FETCH:branch_count_0                       177043                       # Number of branches fetchedcpu.FETCH:branch_count_1                       178092                       # Number of branches fetchedcpu.FETCH:branch_count_2                       245297                       # Number of branches fetchedcpu.FETCH:branch_count_3                       196885                       # Number of branches fetchedcpu.FETCH:branch_rate                        0.448812                       # Number of branch fetches per cyclecpu.FETCH:branch_rate_0                      0.099658                       # Number of branch fetches per cyclecpu.FETCH:branch_rate_1                      0.100248                       # Number of branch fetches per cyclecpu.FETCH:branch_rate_2                      0.138078                       # Number of branch fetches per cyclecpu.FETCH:branch_rate_3                      0.110827                       # Number of branch fetches per cyclecpu.FETCH:chance_pct_0                       0.223364                       # Percentage of all fetch chancescpu.FETCH:chance_pct_1                       0.225093                       # Percentage of all fetch chancescpu.FETCH:chance_pct_2                       0.304266                       # Percentage of all fetch chancescpu.FETCH:chance_pct_3                       0.247278                       # Percentage of all fetch chancescpu.FETCH:chances                              844488                       # Number of fetch opportunitiescpu.FETCH:chances_0                            188628                       # Number of fetch opportunitiescpu.FETCH:chances_1                            190088                       # Number of fetch opportunitiescpu.FETCH:chances_2                            256949                       # Number of fetch opportunitiescpu.FETCH:chances_3                            208823                       # Number of fetch opportunitiescpu.FETCH:choice                               844488                       # Number of times we fetched from our first choicecpu.FETCH:choice.start_dist                               0       844488    100.00%            # Number of times we fetched from our first choice                               1            0      0.00%            # Number of times we fetched from our first choice                               2            0      0.00%            # Number of times we fetched from our first choice                               3            0      0.00%            # Number of times we fetched from our first choicecpu.FETCH:choice.end_distcpu.FETCH:count                               6188286                       # Number of instructions fetchedcpu.FETCH:count_0                             1366382                       # Number of instructions fetchedcpu.FETCH:count_1                             1380875                       # Number of instructions fetchedcpu.FETCH:count_2                             1913100                       # Number of instructions fetchedcpu.FETCH:count_3                             1527929                       # Number of instructions fetchedcpu.FETCH:decisions                            844488                       # number of times the fetch stage chose between threadscpu.FETCH:idle_cycles                          932019                       # number of cycles where fetch stage was idlecpu.FETCH:idle_icache_blocked_cycles               58                       # number of cycles where fetch was idle due to icache blockedcpu.FETCH:idle_rate                             52.46                       # percent of cycles fetch stage was idlecpu.FETCH:prio_changes                              0                       # Number of times priorities were changedcpu.FETCH:prio_changes_0                            0                       # Number of times priorities were changedcpu.FETCH:prio_changes_1                            0                       # Number of times priorities were changedcpu.FETCH:prio_changes_2                            0                       # Number of times priorities were changedcpu.FETCH:prio_changes_3                            0                       # Number of times priorities were changedcpu.FETCH:rate                               3.483401                       # Number of inst fetches per cyclecpu.FETCH:rate_0                             0.769140                       # Number of inst fetches per cyclecpu.FETCH:rate_1                             0.777298                       # Number of inst fetches per cyclecpu.FETCH:rate_2                             1.076889                       # Number of inst fetches per cyclecpu.FETCH:rate_3                             0.860075                       # Number of inst fetches per cyclecpu.FETCH:rate_dist.start_dist                                 # Number of instructions fetched each cycle (Total)cpu.FETCH:rate_dist.samples                    844488                      cpu.FETCH:rate_dist.min_value                       0                                                     0         1618     19.16%                                          1        12919    152.98%                                          2        11262    133.36%                                          3        19288    228.40%                                          4        32559    385.55%                                          5        25221    298.65%                                          6        31033    367.48%                                          7        32264    382.05%                                          8       678324   8032.37%           cpu.FETCH:rate_dist.max_value                       8                      cpu.FETCH:rate_dist.end_distcpu.FETCH:rate_dist_0.start_dist                               # Number of instructions fetched each cycle (Thread 0)cpu.FETCH:rate_dist_0.samples                  188628                      cpu.FETCH:rate_dist_0.min_value                     0                                                     0          468     24.81%                                          1         3210    170.18%                                          2         2790    147.91%                                          3         4873    258.34%                                          4         8341    442.19%                                          5         6301    334.04%                                          6         7657    405.93%                                          7         7742    410.44%                                          8       147246   7806.16%           cpu.FETCH:rate_dist_0.max_value                     8                      cpu.FETCH:rate_dist_0.end_distcpu.FETCH:rate_dist_1.start_dist                               # Number of instructions fetched each cycle (Thread 1)cpu.FETCH:rate_dist_1.samples                  190088                      cpu.FETCH:rate_dist_1.min_value                     0                                                     0           55      2.89%                                          1         3208    168.76%                                          2         2840    149.40%                                          3         4876    256.51%                                          4         8285    435.85%                                          5         6386    335.95%                                          6         7716    405.92%                                          7         7783    409.44%                                          8       148939   7835.27%           cpu.FETCH:rate_dist_1.max_value                     8                      cpu.FETCH:rate_dist_1.end_distcpu.FETCH:rate_dist_2.start_dist                               # Number of instructions fetched each cycle (Thread 2)cpu.FETCH:rate_dist_2.samples                  256949                      cpu.FETCH:rate_dist_2.min_value                     0                                                     0          940     36.58%                                          1         3114    121.19%                                          2         2709    105.43%                                          3         4665    181.55%                                          4         7619    296.52%                                          5         6203    241.41%                                          6         7874    306.44%                                          7         8762    341.00%                                          8       215063   8369.87%           cpu.FETCH:rate_dist_2.max_value                     8                      cpu.FETCH:rate_dist_2.end_distcpu.FETCH:rate_dist_3.start_dist                               # Number of instructions fetched each cycle (Thread 3)cpu.FETCH:rate_dist_3.samples                  208823                      cpu.FETCH:rate_dist_3.min_value                     0                                                     0          155      7.42%                                          1         3387    162.19%                                          2         2923    139.98%                                          3         4874    233.40%                                          4         8314    398.14%                                          5         6331    303.18%                                          6         7786    372.85%                                          7         7977    382.00%                                          8       167076   8000.84%           cpu.FETCH:rate_dist_3.max_value                     8                      cpu.FETCH:rate_dist_3.end_distcpu.IFQ:count                                52944454                       # cumulative IFQ occupancy

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