📄 m5stats.txt
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cpu.DIS:one_rdy_ratio_2 no value # fraction of 2-op insts w/ one ready opcpu.DIS:one_rdy_ratio_3 no value # fraction of 2-op insts w/ one ready opcpu.DIS:op_count 4448321 # number of operations dispatchedcpu.DIS:op_count_0 1388342 # number of operations dispatchedcpu.DIS:op_count_1 570006 # number of operations dispatchedcpu.DIS:op_count_2 1482578 # number of operations dispatchedcpu.DIS:op_count_3 1007395 # number of operations dispatchedcpu.DIS:op_rate 6.728401 # dispatched operations per cyclecpu.DIS:op_rate_0 2.099966 # dispatched operations per cyclecpu.DIS:op_rate_1 0.862175 # dispatched operations per cyclecpu.DIS:op_rate_2 2.242504 # dispatched operations per cyclecpu.DIS:op_rate_3 1.523756 # dispatched operations per cyclecpu.DIS:rate 4.896348 # dispatched_insts per cyclecpu.DIS:rate_0 1.501824 # dispatched_insts per cyclecpu.DIS:rate_1 0.630515 # dispatched_insts per cyclecpu.DIS:rate_2 1.633127 # dispatched_insts per cyclecpu.DIS:rate_3 1.130881 # dispatched_insts per cyclecpu.DIS:second_choice_clust 0 # Number of instructions dispatched to second-choice clustercpu.DIS:second_choice_stall 0 # Number of instructions stalled when first choice not availablecpu.DIS:serialize_stall_cycles 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_0 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_1 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_2 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_3 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serializing_insts 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_0 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_1 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_2 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_3 0 # count of serializing insts dispatchedcpu.DIS:two_input_insts 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_0 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_1 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_2 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_3 0 # Number of two input instructions queuedcpu.DIS:two_input_ratio 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_0 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_1 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_2 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_3 0 # fraction of all insts having 2 inputscpu.FETCH:branch_count 633279 # Number of branches fetchedcpu.FETCH:branch_count_0 208316 # Number of branches fetchedcpu.FETCH:branch_count_1 96365 # Number of branches fetchedcpu.FETCH:branch_count_2 160233 # Number of branches fetchedcpu.FETCH:branch_count_3 168365 # Number of branches fetchedcpu.FETCH:branch_rate 0.957879 # Number of branch fetches per cyclecpu.FETCH:branch_rate_0 0.315093 # Number of branch fetches per cyclecpu.FETCH:branch_rate_1 0.145759 # Number of branch fetches per cyclecpu.FETCH:branch_rate_2 0.242364 # Number of branch fetches per cyclecpu.FETCH:branch_rate_3 0.254664 # Number of branch fetches per cyclecpu.FETCH:chance_pct_0 0.304918 # Percentage of all fetch chancescpu.FETCH:chance_pct_1 0.157510 # Percentage of all fetch chancescpu.FETCH:chance_pct_2 0.282923 # Percentage of all fetch chancescpu.FETCH:chance_pct_3 0.254649 # Percentage of all fetch chancescpu.FETCH:chances 629192 # Number of fetch opportunitiescpu.FETCH:chances_0 191852 # Number of fetch opportunitiescpu.FETCH:chances_1 99104 # Number of fetch opportunitiescpu.FETCH:chances_2 178013 # Number of fetch opportunitiescpu.FETCH:chances_3 160223 # Number of fetch opportunitiescpu.FETCH:choice 629192 # Number of times we fetched from our first choicecpu.FETCH:choice.start_dist 0 629192 100.00% # Number of times we fetched from our first choice 1 0 0.00% # Number of times we fetched from our first choice 2 0 0.00% # Number of times we fetched from our first choice 3 0 0.00% # Number of times we fetched from our first choicecpu.FETCH:choice.end_distcpu.FETCH:count 4820408 # Number of instructions fetchedcpu.FETCH:count_0 1417424 # Number of instructions fetchedcpu.FETCH:count_1 771938 # Number of instructions fetchedcpu.FETCH:count_2 1380469 # Number of instructions fetchedcpu.FETCH:count_3 1250577 # Number of instructions fetchedcpu.FETCH:decisions 629192 # number of times the fetch stage chose between threadscpu.FETCH:idle_cycles 31934 # number of cycles where fetch stage was idlecpu.FETCH:idle_icache_blocked_cycles 0 # number of cycles where fetch was idle due to icache blockedcpu.FETCH:idle_rate 4.83 # percent of cycles fetch stage was idlecpu.FETCH:prio_changes 0 # Number of times priorities were changedcpu.FETCH:prio_changes_0 0 # Number of times priorities were changedcpu.FETCH:prio_changes_1 0 # Number of times priorities were changedcpu.FETCH:prio_changes_2 0 # Number of times priorities were changedcpu.FETCH:prio_changes_3 0 # Number of times priorities were changedcpu.FETCH:rate 7.291209 # Number of inst fetches per cyclecpu.FETCH:rate_0 2.143954 # Number of inst fetches per cyclecpu.FETCH:rate_1 1.167611 # Number of inst fetches per cyclecpu.FETCH:rate_2 2.088057 # Number of inst fetches per cyclecpu.FETCH:rate_3 1.891586 # Number of inst fetches per cyclecpu.FETCH:rate_dist.start_dist # Number of instructions fetched each cycle (Total)cpu.FETCH:rate_dist.samples 629192 cpu.FETCH:rate_dist.min_value 0 0 1311 20.84% 1 2368 37.64% 2 2605 41.40% 3 3372 53.59% 4 6353 100.97% 5 8926 141.86% 6 45149 717.57% 7 11086 176.19% 8 548022 8709.93% cpu.FETCH:rate_dist.max_value 8 cpu.FETCH:rate_dist.end_distcpu.FETCH:rate_dist_0.start_dist # Number of instructions fetched each cycle (Thread 0)cpu.FETCH:rate_dist_0.samples 191852 cpu.FETCH:rate_dist_0.min_value 0 0 801 41.75% 1 1111 57.91% 2 1167 60.83% 3 1339 69.79% 4 2069 107.84% 5 3792 197.65% 6 33022 1721.22% 7 3814 198.80% 8 144737 7544.20% cpu.FETCH:rate_dist_0.max_value 8 cpu.FETCH:rate_dist_0.end_distcpu.FETCH:rate_dist_1.start_dist # Number of instructions fetched each cycle (Thread 1)cpu.FETCH:rate_dist_1.samples 99104 cpu.FETCH:rate_dist_1.min_value 0 0 343 34.61% 1 270 27.24% 2 273 27.55% 3 456 46.01% 4 1138 114.83% 5 801 80.82% 6 1595 160.94% 7 2197 221.69% 8 92031 9286.31% cpu.FETCH:rate_dist_1.max_value 8 cpu.FETCH:rate_dist_1.end_distcpu.FETCH:rate_dist_2.start_dist # Number of instructions fetched each cycle (Thread 2)cpu.FETCH:rate_dist_2.samples 178013 cpu.FETCH:rate_dist_2.min_value 1 0 0 0.00% 1 570 32.02% 2 696 39.10% 3 1014 56.96% 4 1897 106.57% 5 2701 151.73% 6 6570 369.07% 7 1568 88.08% 8 162997 9156.47% cpu.FETCH:rate_dist_2.max_value 8 cpu.FETCH:rate_dist_2.end_distcpu.FETCH:rate_dist_3.start_dist # Number of instructions fetched each cycle (Thread 3)cpu.FETCH:rate_dist_3.samples 160223 cpu.FETCH:rate_dist_3.min_value 0 0 167 10.42% 1 417 26.03% 2 469 29.27% 3 563 35.14% 4 1249 77.95% 5 1632 101.86% 6 3962 247.28% 7 3507 218.88% 8 148257 9253.17% cpu.FETCH:rate_dist_3.max_value 8 cpu.FETCH:rate_dist_3.end_distcpu.IFQ:count 32466291 # cumulative IFQ occupancy
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