📄 m5stats.txt
字号:
56 0 0.00% 10000.00% 58 0 0.00% 10000.00% 60 0 0.00% 10000.00% 62 0 0.00% 10000.00% 64 0 0.00% 10000.00% 66 0 0.00% 10000.00% 68 0 0.00% 10000.00% 70 0 0.00% 10000.00% 72 0 0.00% 10000.00% 74 0 0.00% 10000.00% 76 0 0.00% 10000.00% 78 0 0.00% 10000.00% 80 0 0.00% 10000.00% 82 0 0.00% 10000.00% 84 0 0.00% 10000.00% 86 0 0.00% 10000.00% 88 0 0.00% 10000.00% 90 0 0.00% 10000.00% 92 0 0.00% 10000.00% 94 0 0.00% 10000.00% 96 0 0.00% 10000.00% 98 0 0.00% 10000.00%system.cpu0.IQ:residence:(null).max_value 9 system.cpu0.IQ:residence:(null).end_distsystem.cpu0.IQ:residence:IntAlu.start_dist # cycles from dispatch to issuesystem.cpu0.IQ:residence:IntAlu.samples 758931823 system.cpu0.IQ:residence:IntAlu.min_value 1 0 9308384 122.65% 122.65% 2 6319773 83.27% 205.92% 4 4436558 58.46% 264.38% 6 3105418 40.92% 305.30% 8 64322210 847.54% 1152.84% 10 535807670 7060.02% 8212.86% 12 125526462 1653.99% 9866.85% 14 1175710 15.49% 9882.34% 16 942688 12.42% 9894.76% 18 646913 8.52% 9903.28% 20 473480 6.24% 9909.52% 22 367379 4.84% 9914.36% 24 361571 4.76% 9919.13% 26 317558 4.18% 9923.31% 28 270551 3.56% 9926.88% 30 255756 3.37% 9930.25% 32 242645 3.20% 9933.44% 34 232135 3.06% 9936.50% 36 154619 2.04% 9938.54% 38 150767 1.99% 9940.53% 40 150333 1.98% 9942.51% 42 79706 1.05% 9943.56% 44 120611 1.59% 9945.15% 46 49274 0.65% 9945.80% 48 55562 0.73% 9946.53% 50 108305 1.43% 9947.96% 52 136190 1.79% 9949.75% 54 207245 2.73% 9952.48% 56 45211 0.60% 9953.08% 58 41550 0.55% 9953.62% 60 37865 0.50% 9954.12% 62 144135 1.90% 9956.02% 64 125157 1.65% 9957.67% 66 43822 0.58% 9958.25% 68 42364 0.56% 9958.81% 70 60239 0.79% 9959.60% 72 43641 0.58% 9960.18% 74 30563 0.40% 9960.58% 76 23834 0.31% 9960.89% 78 44438 0.59% 9961.48% 80 22578 0.30% 9961.78% 82 31051 0.41% 9962.18% 84 30835 0.41% 9962.59% 86 27215 0.36% 9962.95% 88 25694 0.34% 9963.29% 90 15681 0.21% 9963.50% 92 13895 0.18% 9963.68% 94 27634 0.36% 9964.04% 96 38631 0.51% 9964.55% 98 10266 0.14% 9964.69%system.cpu0.IQ:residence:IntAlu.overflows 2680051 system.cpu0.IQ:residence:IntAlu.max_value 13139 system.cpu0.IQ:residence:IntAlu.end_distsystem.cpu0.IQ:residence:IntMult.start_dist # cycles from dispatch to issuesystem.cpu0.IQ:residence:IntMult.samples 60757 system.cpu0.IQ:residence:IntMult.min_value 1 0 992 163.27% 163.27% 2 2622 431.56% 594.83% 4 5984 984.91% 1579.74% 6 4830 794.97% 2374.71% 8 4078 671.20% 3045.90% 10 6325 1041.03% 4086.94% 12 4180 687.99% 4774.92% 14 1692 278.49% 5053.41% 16 308 50.69% 5104.10% 18 1505 247.71% 5351.81% 20 661 108.79% 5460.61% 22 859 141.38% 5601.99% 24 2932 482.58% 6084.57% 26 549 90.36% 6174.93% 28 1232 202.77% 6377.70% 30 809 133.15% 6510.85% 32 112 18.43% 6529.29% 34 546 89.87% 6619.15% 36 1165 191.75% 6810.90% 38 84 13.83% 6824.73% 40 13007 2140.82% 8965.55% 42 339 55.80% 9021.35% 44 448 73.74% 9095.08% 46 69 11.36% 9106.44% 48 119 19.59% 9126.03% 50 46 7.57% 9133.60% 52 10 1.65% 9135.24% 54 54 8.89% 9144.13% 56 77 12.67% 9156.80% 58 156 25.68% 9182.48% 60 186 30.61% 9213.09% 62 12 1.98% 9215.07% 64 94 15.47% 9230.54% 66 23 3.79% 9234.33% 68 24 3.95% 9238.28% 70 50 8.23% 9246.51% 72 20 3.29% 9249.80% 74 18 2.96% 9252.76% 76 11 1.81% 9254.57% 78 19 3.13% 9257.70% 80 13 2.14% 9259.84% 82 78 12.84% 9272.68% 84 25 4.11% 9276.79% 86 59 9.71% 9286.50% 88 7 1.15% 9287.65% 90 23 3.79% 9291.44% 92 12 1.98% 9293.41% 94 21 3.46% 9296.87% 96 16 2.63% 9299.50% 98 8 1.32% 9300.82%system.cpu0.IQ:residence:IntMult.overflows 4248 system.cpu0.IQ:residence:IntMult.max_value 496 system.cpu0.IQ:residence:IntMult.end_distsystem.cpu0.IQ:residence:IntDiv.start_dist # cycles from dispatch to issuesystem.cpu0.IQ:residence:IntDiv.samples 0 system.cpu0.IQ:residence:IntDiv.min_value 0 0 0 2 0 4 0 6 0 8 0 10 0 12 0 14 0 16 0 18 0 20 0 22 0 24 0 26 0 28 0 30 0 32 0 34 0 36 0 38 0 40 0 42 0 44 0 46 0 48 0 50 0 52 0 54 0 56 0 58 0 60 0 62 0 64 0 66 0 68 0 70 0 72 0 74 0 76 0 78 0 80 0 82 0 84 0 ⌨️ 快捷键说明
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