📄 m5stats.txt
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cpu.DIS:one_rdy_ratio_2 no value # fraction of 2-op insts w/ one ready opcpu.DIS:one_rdy_ratio_3 no value # fraction of 2-op insts w/ one ready opcpu.DIS:op_count 2160675 # number of operations dispatchedcpu.DIS:op_count_0 815999 # number of operations dispatchedcpu.DIS:op_count_1 209815 # number of operations dispatchedcpu.DIS:op_count_2 720401 # number of operations dispatchedcpu.DIS:op_count_3 414460 # number of operations dispatchedcpu.DIS:op_rate 6.451663 # dispatched operations per cyclecpu.DIS:op_rate_0 2.436531 # dispatched operations per cyclecpu.DIS:op_rate_1 0.626497 # dispatched operations per cyclecpu.DIS:op_rate_2 2.151080 # dispatched operations per cyclecpu.DIS:op_rate_3 1.237556 # dispatched operations per cyclecpu.DIS:rate 4.711190 # dispatched_insts per cyclecpu.DIS:rate_0 1.735215 # dispatched_insts per cyclecpu.DIS:rate_1 0.457928 # dispatched_insts per cyclecpu.DIS:rate_2 1.566052 # dispatched_insts per cyclecpu.DIS:rate_3 0.951995 # dispatched_insts per cyclecpu.DIS:second_choice_clust 0 # Number of instructions dispatched to second-choice clustercpu.DIS:second_choice_stall 0 # Number of instructions stalled when first choice not availablecpu.DIS:serialize_stall_cycles 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_0 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_1 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_2 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serialize_stall_cycles_3 0 # count of cycles dispatch stalled for serializing instcpu.DIS:serializing_insts 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_0 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_1 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_2 0 # count of serializing insts dispatchedcpu.DIS:serializing_insts_3 0 # count of serializing insts dispatchedcpu.DIS:two_input_insts 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_0 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_1 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_2 0 # Number of two input instructions queuedcpu.DIS:two_input_insts_3 0 # Number of two input instructions queuedcpu.DIS:two_input_ratio 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_0 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_1 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_2 0 # fraction of all insts having 2 inputscpu.DIS:two_input_ratio_3 0 # fraction of all insts having 2 inputscpu.FETCH:branch_count 317761 # Number of branches fetchedcpu.FETCH:branch_count_0 129448 # Number of branches fetchedcpu.FETCH:branch_count_1 34646 # Number of branches fetchedcpu.FETCH:branch_count_2 77606 # Number of branches fetchedcpu.FETCH:branch_count_3 76061 # Number of branches fetchedcpu.FETCH:branch_rate 0.948818 # Number of branch fetches per cyclecpu.FETCH:branch_rate_0 0.386525 # Number of branch fetches per cyclecpu.FETCH:branch_rate_1 0.103451 # Number of branch fetches per cyclecpu.FETCH:branch_rate_2 0.231727 # Number of branch fetches per cyclecpu.FETCH:branch_rate_3 0.227114 # Number of branch fetches per cyclecpu.FETCH:chance_pct_0 0.365522 # Percentage of all fetch chancescpu.FETCH:chance_pct_1 0.118582 # Percentage of all fetch chancescpu.FETCH:chance_pct_2 0.274006 # Percentage of all fetch chancescpu.FETCH:chance_pct_3 0.241890 # Percentage of all fetch chancescpu.FETCH:chances 314077 # Number of fetch opportunitiescpu.FETCH:chances_0 114802 # Number of fetch opportunitiescpu.FETCH:chances_1 37244 # Number of fetch opportunitiescpu.FETCH:chances_2 86059 # Number of fetch opportunitiescpu.FETCH:chances_3 75972 # Number of fetch opportunitiescpu.FETCH:choice 314077 # Number of times we fetched from our first choicecpu.FETCH:choice.start_dist 0 314077 100.00% # Number of times we fetched from our first choice 1 0 0.00% # Number of times we fetched from our first choice 2 0 0.00% # Number of times we fetched from our first choice 3 0 0.00% # Number of times we fetched from our first choicecpu.FETCH:choice.end_distcpu.FETCH:count 2383379 # Number of instructions fetchedcpu.FETCH:count_0 831937 # Number of instructions fetchedcpu.FETCH:count_1 290820 # Number of instructions fetchedcpu.FETCH:count_2 665949 # Number of instructions fetchedcpu.FETCH:count_3 594673 # Number of instructions fetchedcpu.FETCH:decisions 314077 # number of times the fetch stage chose between threadscpu.FETCH:idle_cycles 20825 # number of cycles where fetch stage was idlecpu.FETCH:idle_icache_blocked_cycles 0 # number of cycles where fetch was idle due to icache blockedcpu.FETCH:idle_rate 6.22 # percent of cycles fetch stage was idlecpu.FETCH:prio_changes 0 # Number of times priorities were changedcpu.FETCH:prio_changes_0 0 # Number of times priorities were changedcpu.FETCH:prio_changes_1 0 # Number of times priorities were changedcpu.FETCH:prio_changes_2 0 # Number of times priorities were changedcpu.FETCH:prio_changes_3 0 # Number of times priorities were changedcpu.FETCH:rate 7.116646 # Number of inst fetches per cyclecpu.FETCH:rate_0 2.484121 # Number of inst fetches per cyclecpu.FETCH:rate_1 0.868373 # Number of inst fetches per cyclecpu.FETCH:rate_2 1.988489 # Number of inst fetches per cyclecpu.FETCH:rate_3 1.775663 # Number of inst fetches per cyclecpu.FETCH:rate_dist.start_dist # Number of instructions fetched each cycle (Total)cpu.FETCH:rate_dist.samples 314077 cpu.FETCH:rate_dist.min_value 0 0 1071 34.10% 1 1340 42.66% 2 1504 47.89% 3 1870 59.54% 4 3244 103.29% 5 4827 153.69% 6 30316 965.24% 7 4826 153.66% 8 265079 8439.94% cpu.FETCH:rate_dist.max_value 8 cpu.FETCH:rate_dist.end_distcpu.FETCH:rate_dist_0.start_dist # Number of instructions fetched each cycle (Thread 0)cpu.FETCH:rate_dist_0.samples 114802 cpu.FETCH:rate_dist_0.min_value 0 0 649 56.53% 1 795 69.25% 2 856 74.56% 3 975 84.93% 4 1409 122.73% 5 2614 227.70% 6 25074 2184.11% 7 2085 181.62% 8 80345 6998.57% cpu.FETCH:rate_dist_0.max_value 8 cpu.FETCH:rate_dist_0.end_distcpu.FETCH:rate_dist_1.start_dist # Number of instructions fetched each cycle (Thread 1)cpu.FETCH:rate_dist_1.samples 37244 cpu.FETCH:rate_dist_1.min_value 0 0 255 68.47% 1 71 19.06% 2 93 24.97% 3 144 38.66% 4 327 87.80% 5 194 52.09% 6 383 102.84% 7 661 177.48% 8 35116 9428.63% cpu.FETCH:rate_dist_1.max_value 8 cpu.FETCH:rate_dist_1.end_distcpu.FETCH:rate_dist_2.start_dist # Number of instructions fetched each cycle (Thread 2)cpu.FETCH:rate_dist_2.samples 86059 cpu.FETCH:rate_dist_2.min_value 1 0 0 0.00% 1 281 32.65% 2 349 40.55% 3 536 62.28% 4 998 115.97% 5 1437 166.98% 6 3366 391.13% 7 747 86.80% 8 78345 9103.64% cpu.FETCH:rate_dist_2.max_value 8 cpu.FETCH:rate_dist_2.end_distcpu.FETCH:rate_dist_3.start_dist # Number of instructions fetched each cycle (Thread 3)cpu.FETCH:rate_dist_3.samples 75972 cpu.FETCH:rate_dist_3.min_value 0 0 167 21.98% 1 193 25.40% 2 206 27.12% 3 215 28.30% 4 510 67.13% 5 582 76.61% 6 1493 196.52% 7 1333 175.46% 8 71273 9381.48% cpu.FETCH:rate_dist_3.max_value 8 cpu.FETCH:rate_dist_3.end_distcpu.IFQ:count 15461965 # cumulative IFQ occupancy
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