lcd.h

飞思卡尔液带晶驱动的MCU例程 飞思卡尔液带晶驱动的MCU例程

/* LCD properties */
#define LCD_BP_CNT           4   /* number of backplanes */
#define LCD_FP_CNT           15  /* number of frontplanes */
#define LCD_FRAME_FREQUENCY  64  /* desired refresh cycle frequency in Hz */ 
#define LCD_IDLE_CNT         2   /* number of contrast adjustment phases per one refresh cycle */

/* periodic interrupt source related macros */
#define LCD_INT_DIVISOR       4                      /* divisor of bus clock for the interrupt source (to ensure phase time fits into the period register of the timing source (16bits max)) */
#define LCD_INT_FLAG_CLEAR()  PIT.pittf.byte = PTF0	 /* clear the interrupt flag of PIT channel 0 */
#define LCD_INT_PERIOD_SET(i) PIT.pitld0.word = i    /* update period of the interrupt source */
#define LCD_INT_CONFIGURE()   {                                             /* macro to configure the timer */\
                                PIT.pitce.bit.pce0 = 1;                     /* enable PIT channel 0 */\
                                PIT.pitinte.bit.pinte0 = 1;                 /* enable interrupts from channel 0 */\
                                PIT.pitmux.bit.pmux0 = 0;                   /* assign channel 0 to microtimer 0 */\
                                PIT.pitmtld0.byte = (LCD_INT_DIVISOR-1);    /* divide clock source (scale the period to fit into 16 bits) */\
                                PIT.pitld0.word = LCD_data.contrast;        /* set-up first interrupt period */\
                                PIT.pitcflmt.byte = PITE | PITFRZ | PFLMT0; /* enable the PIT module and force reload of the micro counter */\
                                PIT.pitflt.bit.pflt0 = 1;                   /* force reload of counter 0 */\
                                Interrupt.int_cfaddr = (0x3D << 1) & 0xf0;  /* assign PIT0 channel to Xgate, priority 1 */\
                                Interrupt.int_cfdata[0x3D & 0x07].byte = RQST|1;\
                              }
#define LCD_INT_STOP()        PIT.pitce.bit.pce0 = 0 /* macro to stop the interrupt source */

#if (__MWERKS__)
  #pragma MESSAGE DISABLE C1106
#endif

/* structure describing LCD data and current state of the drive */
typedef struct {
  unsigned int  data[LCD_BP_CNT][(LCD_FP_CNT>>4)+(((LCD_FP_CNT&0x0f)>0)?1:0)];
  unsigned int  active_data[LCD_BP_CNT][(LCD_FP_CNT>>4)+(((LCD_FP_CNT&0x0f)>0)?1:0)];
  unsigned char phase:7;
  unsigned char polarity:1;
  unsigned char phase_reload;   /* frame period = (LCD_BP_CNT+LCD_IDLE_CNT)*<interrupt period> */
  unsigned int  active_period;	/* values are copied over from contrast and period at the end of every cycle */
  unsigned int  active_contrast;
  unsigned int  contrast;       /* period for contrast adjustment cycles (allows fine adjustment of timer period during these cycles) */
  unsigned int  period;         /* period for normal run */
} tLCD_data;

/* current LCD pin assignement for the macros below:

PTP0 - LCD pin 1 (BP0)
PTP1 - LCD pin 2 (BP1)
PTP2 - LCD pin 3 (BP2)
PTP3 - LCD pin 4 (BP3)
PTB0 - +5V for resistive dividers on LCD pins 1-4 (BPn)
PTB1 - LCD pin 5 (FP0)
PTB2 - LCD pin 6 (FP1)
PTB3 - LCD pin 7 (FP2)
PTB4 - LCD pin 8 (FP3)
PTB5 - LCD pin 9 (FP4)
PTB6 - LCD pin 10 (FP5)
PTB7 - LCD pin 11 (FP6)
PTA0 - LCD pin 12 (FP7)
PTA1 - LCD pin 13 (FP8)
PTA2 - LCD pin 14 (FP9)
PTA3 - LCD pin 15 (FP10)
PTA4 - LCD pin 16 (FP11)
PTA5 - LCD pin 17 (FP12)
PTA6 - LCD pin 18 (FP13)
PTA7 - LCD pin 19 (FP14)

*/

/* mask for PTP accesses */
#define LCD_PTP_MASK  0x0f


/* macro to assign positive values to FP electrodes */
/* parameter is array of unsigned ints containing the data */
#define LCD_SET_FP_POS(data)  { PORTB.byte=(data[0]<<1)|1; PORTA.byte=(data[0]>>7); }

/* macro to assign negative values to FP electrodes */
/* parameter is array of unsigned ints containing the data */
#define LCD_SET_FP_NEG(data)  { PORTB.byte=((~data[0])<<1)|1; PORTA.byte=((~data[0])>>7); }

/* macro to bring selected BP line low and tri-state the rest */
/* parameter is a number 0..(LCD_BP_CNT-1) */
#define LCD_ONE_BP_LOW(n)     { DDRP.byte&=~LCD_PTP_MASK; PTP.byte&=~LCD_PTP_MASK; DDRP.byte|=(1<<n); }

/* macro to bring selected BP line high and tri-state the rest */
/* parameter is a number 0..(LCD_BP_CNT-1) */
#define LCD_ONE_BP_HIGH(n)    { DDRP.byte&=~LCD_PTP_MASK; PTP.byte|=LCD_PTP_MASK; DDRP.byte|=(1<<n); }

/* macro to bring all BP lines low (used in contrast adjustment cycles) */
#define LCD_ALL_BP_LOW()      { PTP.byte&=~LCD_PTP_MASK; DDRP.byte|=LCD_PTP_MASK; PORTB.byte&=~0x01; }

/* macro to bring all FP lines low (used in contrast adjustment cycles) */
#define LCD_ALL_FP_LOW()      { PORTB.byte=0x01; PORTA.byte=0x00; }

/* macro to bring all BP lines high (used in contrast adjustment cycles) */
#define LCD_ALL_BP_HIGH()     { PTP.byte|=LCD_PTP_MASK; DDRP.byte|=LCD_PTP_MASK; }
  
/* macro to bring all FP lines high (used in contrast adjustment cycles) */
#define LCD_ALL_FP_HIGH()     { PORTB.byte=0xff; PORTA.byte=0xff; }

/* macro to configure all pins as outputs */
#define LCD_ALL_CONFIGURE()   { DDRP.byte|=LCD_PTP_MASK; DDRA.byte=0xff; DDRB.byte=0xff; }

/* macro to bring all pins low, including resistive network power supply */
#define LCD_ALL_PINS_LOW()    { PORTB.byte=0; PORTA.byte=0; PTP.byte&=~LCD_PTP_MASK; }

/* prototypes of CPU functions and the shared data structure */
void LCD_start(unsigned int bus_frequency, int contrast_adj); /* bus frequency is in kHz */
void LCD_contrast(unsigned int bus_frequency, int contrast_adj);
void LCD_stop(void);
#pragma CODE_SEG XGATE_CODE
interrupt void LCD_driver(tLCD_data *lcd_data);
#pragma CODE_SEG DEFAULT
#pragma DATA_SEG __RPAGE_SEG XGATE_DATA
extern tLCD_data LCD_data;
#pragma DATA_SEG DEFAULT