s12ect16b8cv2.h

飞思卡尔液带晶驱动的MCU例程 飞思卡尔液带晶驱动的MCU例程

#define C5I    0x20
#define C6I    0x40
#define C7I    0x80

typedef union uTSCR2    /*On HC12 was TMSK2 */
  {
  tU08   byte;
  struct
    {
    tU08 pr    :3;      /*timer prescaler select */
                        /*prescale settings : 1,2,4,8,16,32 */ 
    tU08 tcre  :1;      /*timer counter reset enable (OC7) */ 
    tU08       :3;      /*not used */
    tU08 toi   :1;      /*timer overflow interrupt enable */ 
    }bit;
  }tTSCR2;

#define PR0    0x01  /*bit masks */
#define PR1    0x02
#define PR2    0x04
#define TCRE   0x08
#define TOI    0x80

typedef union uTFLG1
  {
  tU08   byte;
  struct
    {
    tU08 c0f   :1;      /*capture/compare interrupt flag */
    tU08 c1f   :1;
    tU08 c2f   :1;
    tU08 c3f   :1;
    tU08 c4f   :1;
    tU08 c5f   :1;
    tU08 c6f   :1;
    tU08 c7f   :1;
    }bit;
  }tTFLG1;

#define C0F     0x01 /*bit masks */
#define C1F    0x02
#define C2F    0x04
#define C3F    0x08
#define C4F    0x10
#define C5F    0x20
#define C6F    0x40
#define C7F    0x80

typedef union uTFLG2
  {
  tU08   byte;
  struct
    {
    tU08       :7;      /*not used */
    tU08 tof   :1;      /*timer overflow interrupt flag */
    }bit;
  }tTFLG2;

#define TOF    0x80  /*bit masks */

typedef union uPACTL
  {
  tU08   byte;
  struct
    {
    tU08 pai   :1;      /*pulse acc. input interrupt enable */
    tU08 paovi :1;      /*pulse acc. overflow interrupt enable */
    tU08 clk0  :1;      /*clock source select */
    tU08 clk1  :1;
    tU08 pedge :1;      /*pulse acc. edge control */
    tU08 pamod :1;      /*pulse acc. mode */
    tU08 paen  :1;      /*pulse acc. enable */
    tU08       :1;      /*not used */
    }bit;
  }tPACTL;

#define PAI     0x01 /*bit masks */
#define PAOVI  0x02
#define CLK0   0x04
#define CLK1   0x08
#define PEDGE  0x10
#define PAMOD  0x20
#define PAEN   0x40

typedef union uPAFLG
  {
  tU08   byte;
  struct
    {
    tU08 paif  :1;      /*pulse acc. input flag */
    tU08 paovf :1;      /*pulse acc. overflow flag */
    tU08       :6;     /*not used */
    }bit;
  }tPAFLG;

#define PAIF   0x01
#define PAOVF  0x02

typedef union uPACA
  {
  tU16   word;       /*used if 16-bit pulse acc. used */
  struct           /*MUST use single word access in 16-bit mode */
    {
    tU08 pacn3;         /*access to 8-bit registers   */
    tU08 pacn2;         /*do NOT use this access method in 16-bit mode */
    }byte;
  }tPACA;

typedef union uPACB
  {
  tU16   word;       /*used if 16-bit pulse acc. used */
  struct           /*MUST use single word access in 16-bit mode */
    {
    tU08 pacn1;         /*access to 8-bit registers */
    tU08 pacn0;         /*do NOT use this access method in 16-bit mode */
    }byte;
  }tPACB;

typedef union uMCCTL
  {
  tU08   byte;
  struct
    {
    tU08 mcpr0 :1;      /*modulus counter prescaler select */
    tU08 mcpr1 :1;      /*prescale settings : 1,4,8,16  */
    tU08 mcen  :1;      /*modulus down counter enable */
    tU08 flmc  :1;      /*force load register into modulus count reg */
    tU08 iclat :1;      /*input capture force latch action */
    tU08 rdmcl :1;      /*read modulus down counter load */
    tU08 modmc :1;      /*modulus mode enable */
    tU08 mczi  :1;      /*modulus counter underflow interrupt enable */
    }bit;
  }tMCCTL;

#define MCPR0  0x01  /*bit masks */
#define MCPR1  0x02
#define MCEN   0x04
#define FLMC   0x08
#define ICLAT  0x10
#define RDMCL  0x20
#define MODMC  0x40
#define MCZI   0x80

typedef union uMCFLG
  {
  tU08   byte;
  struct
    {
    tU08 polf0 :1;      /*first input capture polarity status bits */
    tU08 polf1 :1;
    tU08 polf2 :1;
    tU08 polf3 :1;
    tU08       :3;      /*not used */
    tU08 mczf  :1;      /*modulus counter underflow interrupt flag */
    }bit;
  }tMCFLG;

#define POLF0  0x01  /*bit masks */
#define POLF1  0x02
#define POLF2  0x04
#define POLF3  0x08
#define MCZF   0x80

typedef union uICPAR
  {
  tU08   byte;
  struct
    {
    tU08 pa0en :1;      /*pulse accumulator enable bits */
    tU08 pa1en :1;
    tU08 pa2en :1;
    tU08 pa3en :1;
    tU08       :4;      /*not used */
    }bit;
  }tICPAR;

#define PA0EN  0x01  /*bit masks */
#define PA1EN  0x02
#define PA2EN  0x04
#define PA3EN  0x08

typedef union uDLYCT
  {
  tU08   byte;
  struct
    {
    tU08 dly0  :1;      /*delay count select */
    tU08 dly1  :1;
    tU08       :6;      /*not used */
    }bit;
  }tDLYCT;

#define DLY0   0x01  /*bit masks */
#define DLY1   0x02

typedef union uICOVW
  {
  tU08   byte;
  struct
    {
    tU08 novw0 :1;      /*no input capture overwrite bits */
    tU08 novw1 :1;
    tU08 novw2 :1;
    tU08 novw3 :1;
    tU08 novw4 :1;
    tU08 novw5 :1;
    tU08 novw6 :1;
    tU08 novw7 :1;
    }bit;
  }tICOVW;

#define NOVW0  0x01  /*bit masks */
#define NOVW1  0x02
#define NOVW2  0x04
#define NOVW3  0x08
#define NOVW4  0x10
#define NOVW5  0x20
#define NOVW6  0x40
#define NOVW7  0x80

typedef union uICSYS
  {
  tU08   byte;
  struct
    {
    tU08 latq  :1;      /*input control latch or queue mode enable */
    tU08 bufen :1;      /*input capture buffer enable */
    tU08 pacmx :1;      /*8-bit pulse accumulator maximum count */
    tU08 tfmod :1;      /*timer flag setting mode */
    tU08 sh04  :1;      /*share input action of input capture channels */
    tU08 sh15  :1;
    tU08 sh26  :1;
    tU08 sh37  :1;
    }bit;
  }tICSYS;

#define LATQ   0x01  /*bit masks */
#define BUFEN  0x02
#define PACMX  0x04
#define TFMOD  0x08
#define SH04   0x10
#define SH15   0x20
#define SH26   0x40
#define SH37   0x80

typedef union uTIMTST
  {
  tU08   byte;
  struct
    {
    tU08 pcbyp :1;      /*pulse acc. divider chain bypass */
    tU08 tcbyp :1;      /*timer divider chain bypass */
    tU08       :6;      /*not used */
    }bit;
  }tTIMTST;

#define PCBYP  0x01  /*bit masks */
#define TCBYP  0x02

typedef union uPBCTL
  {
  tU08   byte;
  struct
    {
    tU08       :1;      /*not used */
    tU08 pbovi :1;      /*pulse acc. overflow interrupt enable */
    tU08       :4;      /*not used */
    tU08 pben  :1;      /*pulse acc. enable */
    tU08       :1;      /*not used */
    }bit;
  }tPBCTL;

#define PBOVI  0x02
#define PBEN   0x40

typedef union uPBFLG
  {
  tU08   byte;
  struct
    {
    tU08       :1;      /*not used */
    tU08 pbovf :1;      /*pulse acc. overflow flag */
    tU08       :6;      /*not used */
    }bit;
  }tPBFLG;

#define PBOVF  0x02

typedef struct          /*enhanced timer  */
  {
  volatile tTIOS  tios;   /*timer input capture/output compare select */
  volatile tCFORC cforc;  /*timer compare force register */
  volatile tOC7M  oc7m;   /*output compare 7 mask register */
  volatile tOC7D  oc7d;   /*output compare 7 data register */
  volatile tTCNT  tcnt;   /*WORD - timer count register */
  volatile tTSCR1 tscr1;  /*timer system control register 1 */
  volatile tTTOV  ttov;   /*timer toggle on overflow register */
  volatile tTCTL1 tctl1;  /*timer control register 1 */
  volatile tTCTL2 tctl2;  /*timer control register 2 */
  volatile tTCTL3 tctl3;  /*timer control register 3 */
  volatile tTCTL4 tctl4;  /*timer control register 4 */
  volatile tTIE   tie;    /*timer interrupt mask 1 */
  volatile tTSCR2 tscr2;  /*timer system control register 2 */
  volatile tTFLG1 tflg1;  /*timer interrupt flag 1 */
  volatile tTFLG2 tflg2;  /*timer interrupt flag 2 */
  volatile tREG16 tc[8];  /*WORD - timer input capture/output compare regs */
  volatile tPACTL pactl;  /*pulse accumulator control register */
  volatile tPAFLG paflg;  /*pulse accumulator flag register */
  volatile tPACA  paca;   /*WORD - pulse accumulator A count register */
  volatile tPACB  pacb;   /*WORD - pulse accumulator B count register */
  volatile tMCCTL mcctl;  /*modulus down counter control register */
  volatile tMCFLG mcflg;  /*modulus down counter flag register */
  volatile tICPAR icpar;  /*input control pulse accumulator control reg */
  volatile tDLYCT dlyct;  /*delay counter control register */
  volatile tICOVW icovw;  /*input control overwrite register */
  volatile tICSYS icsys;  /*input control system control register */
           tU08   reserved;
  volatile tTIMTST timtst;/*timer test register */
  volatile tREG08	ptpsr;  /*precision prescaler */
  volatile tREG08 ptmcpsr;/*precision prescaler for modulus counter */
  volatile tPBCTL pbctl;  /*pulse accumulator B control register */
  volatile tPBFLG pbflg;  /*pulse accumulator B flag register */
  volatile tREG08 pa3h;   /*8-bit pulse holding registers */
  volatile tREG08 pa2h;   /*  not declared as an array due to their */
  volatile tREG08 pa1h;   /*  reverse ordering in the memory map */
  volatile tREG08 pa0h;
  volatile tREG16 mccnt;  /*WORD - modulus down counter count register */
  volatile tREG16 tch[4]; /*WORD - timer input capture holding registers */
  }tTIMER;

#endif /*S12ECT16B8CV2_H */