smdk6410.c

来自「s3c6410的 Uboot 代码, 感兴趣的可以看看呀」· C语言 代码 · 共 159 行

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/* * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH <www.elinos.com> * Marius Groeger <mgroeger@sysgo.de> * * (C) Copyright 2002 * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */#include <common.h>#include <regs.h>/* ------------------------------------------------------------------------- */#define CS8900_Tacs	(0x0)	// 0clk		address set-up#define CS8900_Tcos	(0x4)	// 4clk		chip selection set-up#define CS8900_Tacc	(0xE)	// 14clk	access cycle#define CS8900_Tcoh	(0x1)	// 1clk		chip selection hold#define CS8900_Tah	(0x4)	// 4clk		address holding time#define CS8900_Tacp	(0x6)	// 6clk		page mode access cycle#define CS8900_PMC	(0x0)	// normal(1data)page mode configurationstatic inline void delay(unsigned long loops){	__asm__ volatile ("1:\n" "subs %0, %1, #1\n" "bne 1b":"=r" (loops):"0"(loops));}/* * Miscellaneous platform dependent initialisations */static void cs8900_pre_init(void){	SROM_BW_REG &= ~(0xf << 4);	SROM_BW_REG |= (1<<7) | (1<<6) | (1<<4);	SROM_BC1_REG = ((CS8900_Tacs<<28)+(CS8900_Tcos<<24)+(CS8900_Tacc<<16)+(CS8900_Tcoh<<12)+(CS8900_Tah<<8)+(CS8900_Tacp<<4)+(CS8900_PMC));}int board_init(void){	DECLARE_GLOBAL_DATA_PTR;	cs8900_pre_init();	gd->bd->bi_arch_number = MACH_TYPE;	gd->bd->bi_boot_params = (PHYS_SDRAM_1+0x100);#if 0	icache_enable();	dcache_enable();#endif	return 0;}int dram_init(void){	DECLARE_GLOBAL_DATA_PTR;	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;	return 0;}#ifdef BOARD_LATE_INIT#if defined(CONFIG_BOOT_NAND)int board_late_init (void){	uint *magic = (uint*)(PHYS_SDRAM_1);	char boot_cmd[100];	if ((0x24564236 == magic[0]) && (0x20764316 == magic[1])) {		sprintf(boot_cmd, "nand erase 0 40000;nand write %08x 0 40000", PHYS_SDRAM_1 + 0x8000);		magic[0] = 0;		magic[1] = 0;		printf("\nready for self-burning U-Boot image\n\n");		setenv("bootdelay", "0");		setenv("bootcmd", boot_cmd);	}	return 0;}#elif defined(CONFIG_BOOT_MOVINAND)int board_late_init (void){	uint *magic = (uint*)(PHYS_SDRAM_1);	char boot_cmd[100];	int hc;	hc = (magic[2] & 0x1) ? 1 : 0;	if ((0x24564236 == magic[0]) && (0x20764316 == magic[1])) {		sprintf(boot_cmd, "movi init %d %d;movi write u-boot %08x", magic[3], hc, PHYS_SDRAM_1 + 0x8000);		magic[0] = 0;		magic[1] = 0;		printf("\nready for self-burning U-Boot image\n\n");		setenv("bootdelay", "0");		setenv("bootcmd", boot_cmd);	}	return 0;}#elseint board_late_init (void){	return 0;}#endif#endif#ifdef CONFIG_DISPLAY_BOARDINFOint checkboard(void){	printf("Board:   SMDK6410\n");	return (0);}#endif#ifdef CONFIG_ENABLE_MMUulong virt_to_phy_smdk6410(ulong addr){	if ((0xc0000000 <= addr) && (addr < 0xc8000000))		return (addr - 0xc0000000 + 0x50000000);	else		printf("do not support this address : %08lx\n", addr);	return addr;}#endif#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)#include <linux/mtd/nand.h>extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];void nand_init(void){	nand_probe(CFG_NAND_BASE);        if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {                print_size(nand_dev_desc[0].totlen, "\n");        }}#endif

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