cpu_init.s

来自「s3c6410的 Uboot 代码, 感兴趣的可以看看呀」· S 代码 · 共 64 行

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#include <config.h>#include <s3c2440.h>	/* set memory control registers */	.globl mem_con_initmem_con_init:	/* you must make sure that this sequence is unusual in dram	 * initialization. if you want to find normal sequence	 * check 2443/2413 as reference. by scsuh.	 */	mov     r1, #ELFIN_MEM_CON_BASE	add     r3, r1, #521:	ldr     r4, [r0], #4	str     r4, [r1], #4	cmp     r1, r3	bne     1b	mov     pc, lr#ifdef CONFIG_PM	.align 4PMCTL1_ADDR:	.long 0x56000080PMST_ADDR:	.long 0x560000B4PMSR0_ADDR:	.long 0x560000B8GPBCON:		.long 0x56000010GPBDAT:		.long 0x56000014GPFCON_reg:	.long 0x56000050GPFDAT_reg:	.long 0x56000054#endif/* Below code is for ARM920T */	.globl cleanDCachecleanDCache:	mcr	p15, 0, r0, c7, c10, 2	add	r0, r0, #(1<<5)	tst	r0, #(1<<7)	beq	cleanDCache	bic	r0, r0, #(1<<7)	adds	r0, r0, #(1<<26)	bcc	cleanDCache	mov	pc, lr	.globl cleanFlushDCachecleanFlushDCache:	mcr	p15, 0, r0, c7, c14, 2	add	r0, r0, #(1<<5)	tst	r0, #(1<<7)	beq	cleanFlushDCache	bic	r0, r0, #(1<<7)	adds	r0, r0, #(1<<26)	bcc	cleanFlushDCache	mov	pc, lr	.globl cleanFlushCachecleanFlushCache:	mrc	p15, 0, pc, c7, c14, 3	/* test/cleanflush D-Cache */	bne	cleanFlushCache	mcr	p15, 0, r0, c7, c5, 0	/* flush I-Cache */	mov	pc, lr	.ltorg

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