📄 foc_multilevel.mdl
字号:
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
rep_seq_t "[0 25e-6 50e-6 75e-6 100e-6]"
rep_seq_y "[0 -1 0 1 0]"
}
Block {
BlockType Outport
Name "vao"
Position [910, 278, 940, 292]
FontName "Arial"
FontSize 14
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "vbo"
Position [920, 528, 950, 542]
FontName "Arial"
FontSize 14
Port "2"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Outport
Name "vco"
Position [965, 773, 995, 787]
FontName "Arial"
FontSize 14
Port "3"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Line {
SrcBlock "\n"
SrcPort 1
Points [30, 0; 0, 5; 25, 0]
Branch {
DstBlock "phase leg a"
DstPort 1
}
Branch {
Points [0, 105]
Branch {
DstBlock "phase leg b"
DstPort 1
}
Branch {
Points [0, 125]
DstBlock "phase leg c"
DstPort 1
}
}
}
Line {
SrcBlock "\n\n"
SrcPort 1
Points [30, 0; 0, -5; 10, 0]
Branch {
DstBlock "phase leg a"
DstPort 3
}
Branch {
Points [0, 105]
Branch {
Points [0, 125]
DstBlock "phase leg c"
DstPort 3
}
Branch {
DstBlock "phase leg b"
DstPort 3
}
}
}
Line {
SrcBlock "phase leg a"
SrcPort 1
Points [50, 0]
Branch {
Points [30, 0]
}
Branch {
Points [0, 245]
DstBlock "Add1"
DstPort 1
}
}
Line {
SrcBlock "vao*"
SrcPort 1
Points [75, 0]
Branch {
DstBlock "Comparator - a"
DstPort 2
}
Branch {
Points [0, 370]
DstBlock "Comparator - a1"
DstPort 2
}
}
Line {
SrcBlock "Comparator - a"
SrcPort 1
DstBlock "phase leg a"
DstPort 2
}
Line {
SrcBlock "vco*"
SrcPort 1
Points [30, 0]
Branch {
DstBlock "Comparator - c"
DstPort 2
}
Branch {
Points [0, 370]
DstBlock "Comparator - c1"
DstPort 2
}
}
Line {
SrcBlock "Comparator - c"
SrcPort 1
DstBlock "phase leg c"
DstPort 2
}
Line {
SrcBlock "vbo*\n"
SrcPort 1
Points [50, 0]
Branch {
DstBlock "Comparator - b"
DstPort 2
}
Branch {
Points [0, 370]
DstBlock "Comparator - b1"
DstPort 2
}
}
Line {
SrcBlock "Comparator - b"
SrcPort 1
DstBlock "phase leg b"
DstPort 2
}
Line {
SrcBlock "phase leg b"
SrcPort 1
Points [60, 0]
Branch {
Points [25, 0]
}
Branch {
Points [0, 320]
DstBlock "Add2"
DstPort 1
}
}
Line {
SrcBlock "phase leg c"
SrcPort 1
Points [15, 0]
Branch {
Points [65, 0]
}
Branch {
Points [0, 355]
DstBlock "Add3"
DstPort 1
}
}
Line {
SrcBlock "vref"
SrcPort 1
Points [15, 0; 0, 30]
Branch {
DstBlock "Comparator - a"
DstPort 1
}
Branch {
Points [0, 105]
Branch {
DstBlock "Comparator - b"
DstPort 1
}
Branch {
Points [0, 125]
DstBlock "Comparator - c"
DstPort 1
}
}
}
Line {
SrcBlock "\n1"
SrcPort 1
Points [30, 0; 0, 5; 25, 0]
Branch {
DstBlock "phase leg a1"
DstPort 1
}
Branch {
Points [0, 105]
Branch {
DstBlock "phase leg b1"
DstPort 1
}
Branch {
Points [0, 125]
DstBlock "phase leg c1"
DstPort 1
}
}
}
Line {
SrcBlock "\n\n1"
SrcPort 1
Points [30, 0; 0, -5; 10, 0]
Branch {
DstBlock "phase leg a1"
DstPort 3
}
Branch {
Points [0, 105]
Branch {
Points [0, 125]
DstBlock "phase leg c1"
DstPort 3
}
Branch {
DstBlock "phase leg b1"
DstPort 3
}
}
}
Line {
SrcBlock "phase leg a1"
SrcPort 1
Points [80, 0; 0, -110]
DstBlock "Add1"
DstPort 2
}
Line {
SrcBlock "Comparator - a1"
SrcPort 1
DstBlock "phase leg a1"
DstPort 2
}
Line {
SrcBlock "Comparator - c1"
SrcPort 1
DstBlock "phase leg c1"
DstPort 2
}
Line {
SrcBlock "Comparator - b1"
SrcPort 1
DstBlock "phase leg b1"
DstPort 2
}
Line {
SrcBlock "phase leg b1"
SrcPort 1
Points [150, 0]
DstBlock "Add2"
DstPort 2
}
Line {
SrcBlock "phase leg c1"
SrcPort 1
DstBlock "Add3"
DstPort 2
}
Line {
SrcBlock "vref1"
SrcPort 1
Points [15, 0; 0, 30]
Branch {
DstBlock "Comparator - a1"
DstPort 1
}
Branch {
Points [0, 105]
Branch {
DstBlock "Comparator - b1"
DstPort 1
}
Branch {
Points [0, 125]
DstBlock "Comparator - c1"
DstPort 1
}
}
}
Line {
SrcBlock "Add1"
SrcPort 1
Points [10, 0]
Branch {
Points [40, 0]
Branch {
Points [10, 0]
}
Branch {
Points [15, 0]
DstBlock "Demo"
DstPort 1
}
}
Branch {
Points [0, -105]
DstBlock "vao"
DstPort 1
}
}
Line {
SrcBlock "Add2"
SrcPort 1
Points [10, 0]
Branch {
Points [65, 0]
DstBlock "Demo"
DstPort 2
}
Branch {
Points [0, -35]
DstBlock "vbo"
DstPort 1
}
}
Line {
SrcBlock "Add3"
SrcPort 1
Points [65, 0]
Branch {
Points [30, 0]
DstBlock "Demo"
DstPort 3
}
Branch {
Points [0, 50]
DstBlock "vco"
DstPort 1
}
}
}
}
Block {
BlockType SubSystem
Name "Vector Controller"
Ports [2, 3]
Position [285, 103, 335, 217]
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "Vector Controller"
Location [2, 82, 790, 554]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "wr*"
Position [25, 28, 55, 42]
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Inport
Name "wr"
Position [75, 43, 105, 57]
Port "2"
IconDisplay "Port number"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Abs
Name "Abs"
Position [405, 265, 435, 295]
}
Block {
BlockType From
Name "From1"
Position [300, 60, 330, 90]
CloseFcn "tagdialog Close"
GotoTag "iqs"
TagVisibility "global"
}
Block {
BlockType From
Name "From3"
Position [300, 140, 330, 170]
CloseFcn "tagdialog Close"
GotoTag "ids"
TagVisibility "global"
}
Block {
BlockType Gain
Name "Gain"
Position [420, 205, 485, 245]
Gain "lm/tr"
ParameterDataType "sfix(16)"
ParameterScaling "2^0"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType Math
Name "Math\nFunction"
Ports [1, 1]
Position [475, 265, 505, 295]
Operator "reciprocal"
OutDataType "sfix(16)"
OutScaling "2^0"
}
Block {
BlockType SubSystem
Name "PI Controller1"
Ports [1, 1]
Position [490, 40, 520, 70]
ShowName off
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
MaskType "PI Controller"
MaskDescription "Enter expressions for proportional, integral, and derivative terms.\nP+I/s"
MaskHelp "This block implements a PID controller where parameters are entered for the Proportional, Integral and Derivative terms. Unmask this block to see how it works. The derivative term is implemented using a true derivative block."
MaskPromptString "Proportional:|Integral:"
MaskStyleString "edit,edit"
MaskTunableValueString "on,on"
MaskCallbackString "|"
MaskEnableString "on,on"
MaskVisibilityString "on,on"
MaskToolTipString "on,on"
MaskVarAliasString ","
MaskVariables "P=@1;I=@2;"
MaskDisplay "disp('PI')"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
MaskValueString "10000|100"
MaskTabNameString ","
System {
Name "PI Controller1"
Location [290, 337, 652, 557]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "e"
Position [25, 65, 45, 85]
IconDisplay "Port number"
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -