📄 board_lowlevel.lst
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\ 00000058 60119FE5 LDR R1,??LowLevelInit_1+0x4 ;; 0x207c3f0c
\ 0000005C 001080E5 STR R1,[R0, #+0]
125 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCKB));
\ ??LowLevelInit_3:
\ 00000060 9700E0E3 MVN R0,#+151
\ 00000064 C00FC0E3 BIC R0,R0,#0x300
\ 00000068 000090E5 LDR R0,[R0, #+0]
\ 0000006C 040010E3 TST R0,#0x4
\ 00000070 FAFFFF0A BEQ ??LowLevelInit_3
126
127 /* Wait for the master clock if it was already initialized */
128 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_4:
\ 00000074 9700E0E3 MVN R0,#+151
\ 00000078 C00FC0E3 BIC R0,R0,#0x300
\ 0000007C 000090E5 LDR R0,[R0, #+0]
\ 00000080 080010E3 TST R0,#0x8
\ 00000084 FAFFFF0A BEQ ??LowLevelInit_4
129
130 /* Switch to fast clock
131 **********************/
132 /* Switch to main oscillator + prescaler */
133 AT91C_BASE_PMC->PMC_MCKR = BOARD_PRESCALER;
\ 00000088 CF00E0E3 MVN R0,#+207
\ 0000008C C00FC0E3 BIC R0,R0,#0x300
\ 00000090 401FA0E3 MOV R1,#+256
\ 00000094 001080E5 STR R1,[R0, #+0]
134 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_5:
\ 00000098 9700E0E3 MVN R0,#+151
\ 0000009C C00FC0E3 BIC R0,R0,#0x300
\ 000000A0 000090E5 LDR R0,[R0, #+0]
\ 000000A4 080010E3 TST R0,#0x8
\ 000000A8 FAFFFF0A BEQ ??LowLevelInit_5
135
136 /* Switch to PLL + prescaler */
137 AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLLA_CLK;
\ 000000AC CF00E0E3 MVN R0,#+207
\ 000000B0 C00FC0E3 BIC R0,R0,#0x300
\ 000000B4 000090E5 LDR R0,[R0, #+0]
\ 000000B8 020090E3 ORRS R0,R0,#0x2
\ 000000BC CF10E0E3 MVN R1,#+207
\ 000000C0 C01FC1E3 BIC R1,R1,#0x300
\ 000000C4 000081E5 STR R0,[R1, #+0]
138 while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY));
\ ??LowLevelInit_6:
\ 000000C8 9700E0E3 MVN R0,#+151
\ 000000CC C00FC0E3 BIC R0,R0,#0x300
\ 000000D0 000090E5 LDR R0,[R0, #+0]
\ 000000D4 080010E3 TST R0,#0x8
\ 000000D8 FAFFFF0A BEQ ??LowLevelInit_6
139 //#endif //#if !defined(sdram)
140
141 /* Initialize AIC
142 ****************/
143
144 AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
\ 000000DC DB00E0E3 MVN R0,#+219
\ 000000E0 E00EC0E3 BIC R0,R0,#0xE00
\ 000000E4 0010E0E3 MVN R1,#+0
\ 000000E8 001080E5 STR R1,[R0, #+0]
145 AT91C_BASE_AIC->AIC_SVR[0] = (unsigned int) defaultFiqHandler;
\ 000000EC 7F00E0E3 MVN R0,#+127
\ 000000F0 F00EC0E3 BIC R0,R0,#0xF00
\ 000000F4 C8109FE5 LDR R1,??LowLevelInit_1+0x8 ;; defaultFiqHandler
\ 000000F8 001080E5 STR R1,[R0, #+0]
146 for (i = 1; i < 31; i++)
\ 000000FC 0100A0E3 MOV R0,#+1
\ 00000100 0040B0E1 MOVS R4,R0
\ ??LowLevelInit_7:
\ 00000104 FF4014E2 ANDS R4,R4,#0xFF ;; Zero extend
\ 00000108 1F0054E3 CMP R4,#+31
\ 0000010C 0700002A BCS ??LowLevelInit_8
147 {
148 AT91C_BASE_AIC->AIC_SVR[i] = (unsigned int) defaultIrqHandler;
\ 00000110 0400B0E1 MOVS R0,R4
\ 00000114 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 00000118 0410A0E3 MOV R1,#+4
\ 0000011C 910010E0 MULS R0,R1,R0
\ 00000120 A0109FE5 LDR R1,??LowLevelInit_1+0xC ;; defaultIrqHandler
\ 00000124 801F00E5 STR R1,[R0, #-3968]
149 }
\ 00000128 014094E2 ADDS R4,R4,#+1
\ 0000012C F4FFFFEA B ??LowLevelInit_7
150 AT91C_BASE_AIC->AIC_SPU = (unsigned int) defaultSpuriousHandler;
\ ??LowLevelInit_8:
\ 00000130 CB00E0E3 MVN R0,#+203
\ 00000134 E00EC0E3 BIC R0,R0,#0xE00
\ 00000138 8C109FE5 LDR R1,??LowLevelInit_1+0x10 ;; defaultSpuriousHandler
\ 0000013C 001080E5 STR R1,[R0, #+0]
151
152 // Unstack nested interrupts
153 for (i = 0; i < 8 ; i++)
\ 00000140 0000A0E3 MOV R0,#+0
\ 00000144 0040B0E1 MOVS R4,R0
\ ??LowLevelInit_9:
\ 00000148 FF4014E2 ANDS R4,R4,#0xFF ;; Zero extend
\ 0000014C 080054E3 CMP R4,#+8
\ 00000150 0500002A BCS ??LowLevelInit_10
154 {
155 AT91C_BASE_AIC->AIC_EOICR = 0;
\ 00000154 CF00E0E3 MVN R0,#+207
\ 00000158 E00EC0E3 BIC R0,R0,#0xE00
\ 0000015C 0010A0E3 MOV R1,#+0
\ 00000160 001080E5 STR R1,[R0, #+0]
156 }
\ 00000164 014094E2 ADDS R4,R4,#+1
\ 00000168 F6FFFFEA B ??LowLevelInit_9
157
158 /*
159 // IRQ_Handler_Entry
160 // Init Interrupt Controller
161 AT91F_AIC_Open( AT91C_BASE_AIC, // pointer to the AIC registers
162 AT91C_AIC_BRANCH_OPCODE, // IRQ exception vector
163 AT91F_Default_FIQ_handler, // \arg Default FIQ vector exception
164 AT91F_Default_IRQ_handler, // \arg Default Handler set in ISR
165 AT91F_Spurious_handler, // \arg Default Spurious Handler
166 0); // Protect mode AT91C_AIC_DCR_PROT
167
168 // Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ
169 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
170 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
171 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
172 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
173 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
174 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
175 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
176 AT91F_AIC_AcknowledgeIt(AT91C_BASE_AIC);
177
178 AT91F_AIC_SetExceptionVector((unsigned int *)0x0C, AT91F_FetchAbort);
179 AT91F_AIC_SetExceptionVector((unsigned int *)0x10, AT91F_DataAbort);
180 AT91F_AIC_SetExceptionVector((unsigned int *)0x4, AT91F_Undef);
181 */
182
183 /* Watchdog initialization
184 *************************/
185 AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
\ ??LowLevelInit_10:
\ 0000016C BB00E0E3 MVN R0,#+187
\ 00000170 800FC0E3 BIC R0,R0,#0x200
\ 00000174 801CA0E3 MOV R1,#+32768
\ 00000178 001080E5 STR R1,[R0, #+0]
186
187 /* Remap
188 *******/
189 BOARD_RemapRam();
\ 0000017C ........ BL BOARD_RemapRam
190
191 // Disable RTT and PIT interrupts (potential problem when program A
192 // configures RTT, then program B wants to use PIT only, interrupts
193 // from the RTT will still occur since they both use AT91C_ID_SYS)
194 AT91C_BASE_RTTC->RTTC_RTMR &= ~(AT91C_RTTC_ALMIEN | AT91C_RTTC_RTTINCIEN);
\ 00000180 DF00E0E3 MVN R0,#+223
\ 00000184 800FC0E3 BIC R0,R0,#0x200
\ 00000188 000090E5 LDR R0,[R0, #+0]
\ 0000018C C00BD0E3 BICS R0,R0,#0x30000
\ 00000190 DF10E0E3 MVN R1,#+223
\ 00000194 801FC1E3 BIC R1,R1,#0x200
\ 00000198 000081E5 STR R0,[R1, #+0]
195 AT91C_BASE_PITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;
\ 0000019C CF00E0E3 MVN R0,#+207
\ 000001A0 800FC0E3 BIC R0,R0,#0x200
\ 000001A4 000090E5 LDR R0,[R0, #+0]
\ 000001A8 8007D0E3 BICS R0,R0,#0x2000000
\ 000001AC CF10E0E3 MVN R1,#+207
\ 000001B0 801FC1E3 BIC R1,R1,#0x200
\ 000001B4 000081E5 STR R0,[R1, #+0]
196 }
\ 000001B8 1080BDE8 POP {R4,PC} ;; return
\ ??LowLevelInit_1:
\ 000001BC 09BF6020 DC32 0x2060bf09
\ 000001C0 0C3F7C20 DC32 0x207c3f0c
\ 000001C4 ........ DC32 defaultFiqHandler
\ 000001C8 ........ DC32 defaultIrqHandler
\ 000001CC ........ DC32 defaultSpuriousHandler
197
Maximum stack usage in bytes:
Function .cstack
-------- -------
LowLevelInit 0
defaultFiqHandler 0
defaultIrqHandler 0
defaultSpuriousHandler 0
Section sizes:
Function/Label Bytes
-------------- -----
defaultSpuriousHandler 4
defaultFiqHandler 4
defaultIrqHandler 4
LowLevelInit 464
476 bytes in section .text
476 bytes of CODE memory
Errors: none
Warnings: none
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