📄 pdc.lst
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###############################################################################
# #
# 08/Mar/2009 17:40:42 #
# IAR ANSI C/C++ Compiler V5.20.2.21007/W32 EVALUATION for ARM #
# Copyright 1999-2008 IAR Systems AB. #
# #
# Cpu mode = arm #
# Endian = little #
# Source file = E:\IAR\at91lib\peripherals\pdc\pdc.c #
# Command line = E:\IAR\at91lib\peripherals\pdc\pdc.c -D at91sam9260 -D #
# sdram -lC E:\IAR\at91sam9260-ek\basic-twi-eeprom-project #
# \ewp\at91sam9260_sdram\List\ --remarks --diag_suppress #
# Pe826,Pe1375 -o E:\IAR\at91sam9260-ek\basic-twi-eeprom-p #
# roject\ewp\at91sam9260_sdram\Obj\ --no_cse --no_unroll #
# --no_inline --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little #
# --cpu=ARM926EJ-S -e --fpu=None --dlib_config #
# "D:\Program Files\IAR Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\DLib_Config_Full.h" -I #
# E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\..\.. #
# \..\at91lib\ -I E:\IAR\at91sam9260-ek\basic-twi-eeprom-p #
# roject\ewp\..\..\..\at91lib\boards\at91sam9260-ek\ -I #
# E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\..\.. #
# \..\at91lib\peripherals\ -I #
# E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\..\.. #
# \..\at91lib\components\ -I E:\IAR\at91sam9260-ek\basic-t #
# wi-eeprom-project\ewp\..\..\..\at91lib\usb\ -I #
# "D:\Program Files\IAR Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\" --interwork --cpu_mode arm -On #
# List file = E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\at91s #
# am9260_sdram\List\pdc.lst #
# Object file = E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\at91s #
# am9260_sdram\Obj\pdc.o #
# #
# #
###############################################################################
E:\IAR\at91lib\peripherals\pdc\pdc.c
1
2
3 #include "pdc.h"
4
5 /* *****************************************************************************
6 SOFTWARE API FOR PDC
7 ***************************************************************************** */
8 //*----------------------------------------------------------------------------
9 //* \fn AT91F_PDC_SetNextRx
10 //* \brief Set the next receive transfer descriptor
11 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
12 void AT91F_PDC_SetNextRx (
13 AT91PS_PDC pPDC, // \arg pointer to a PDC controller
14 char *address, // \arg address to the next bloc to be received
15 unsigned int bytes) // \arg number of bytes to be received
16 {
17 pPDC->PDC_RNPR = (unsigned int) address;
\ AT91F_PDC_SetNextRx:
\ 00000000 101080E5 STR R1,[R0, #+16]
18 pPDC->PDC_RNCR = bytes;
\ 00000004 142080E5 STR R2,[R0, #+20]
19 }
\ 00000008 1EFF2FE1 BX LR ;; return
20
21 //*----------------------------------------------------------------------------
22 //* \fn AT91F_PDC_SetNextTx
23 //* \brief Set the next transmit transfer descriptor
24 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
25 void AT91F_PDC_SetNextTx (
26 AT91PS_PDC pPDC, // \arg pointer to a PDC controller
27 char *address, // \arg address to the next bloc to be transmitted
28 unsigned int bytes) // \arg number of bytes to be transmitted
29 {
30 pPDC->PDC_TNPR = (unsigned int) address;
\ AT91F_PDC_SetNextTx:
\ 00000000 181080E5 STR R1,[R0, #+24]
31 pPDC->PDC_TNCR = bytes;
\ 00000004 1C2080E5 STR R2,[R0, #+28]
32 }
\ 00000008 1EFF2FE1 BX LR ;; return
33
34 //*----------------------------------------------------------------------------
35 //* \fn AT91F_PDC_SetRx
36 //* \brief Set the receive transfer descriptor
37 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
38 void AT91F_PDC_SetRx (
39 AT91PS_PDC pPDC, // \arg pointer to a PDC controller
40 char *address, // \arg address to the next bloc to be received
41 unsigned int bytes) // \arg number of bytes to be received
42 {
43 pPDC->PDC_RPR = (unsigned int) address;
\ AT91F_PDC_SetRx:
\ 00000000 001080E5 STR R1,[R0, #+0]
44 pPDC->PDC_RCR = bytes;
\ 00000004 042080E5 STR R2,[R0, #+4]
45 }
\ 00000008 1EFF2FE1 BX LR ;; return
46
47 //*----------------------------------------------------------------------------
48 //* \fn AT91F_PDC_SetTx
49 //* \brief Set the transmit transfer descriptor
50 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
51 void AT91F_PDC_SetTx (
52 AT91PS_PDC pPDC, // \arg pointer to a PDC controller
53 char *address, // \arg address to the next bloc to be transmitted
54 unsigned int bytes) // \arg number of bytes to be transmitted
55 {
56 pPDC->PDC_TPR = (unsigned int) address;
\ AT91F_PDC_SetTx:
\ 00000000 081080E5 STR R1,[R0, #+8]
57 pPDC->PDC_TCR = bytes;
\ 00000004 0C2080E5 STR R2,[R0, #+12]
58 }
\ 00000008 1EFF2FE1 BX LR ;; return
59
60 //*----------------------------------------------------------------------------
61 //* \fn AT91F_PDC_EnableTx
62 //* \brief Enable transmit
63 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
64 void AT91F_PDC_EnableTx (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
65 {
66 pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
\ AT91F_PDC_EnableTx:
\ 00000000 401FA0E3 MOV R1,#+256
\ 00000004 201080E5 STR R1,[R0, #+32]
67 }
\ 00000008 1EFF2FE1 BX LR ;; return
68
69 //*----------------------------------------------------------------------------
70 //* \fn AT91F_PDC_EnableRx
71 //* \brief Enable receive
72 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
73 void AT91F_PDC_EnableRx (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
74 {
75 pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
\ AT91F_PDC_EnableRx:
\ 00000000 0110A0E3 MOV R1,#+1
\ 00000004 201080E5 STR R1,[R0, #+32]
76 }
\ 00000008 1EFF2FE1 BX LR ;; return
77
78 //*----------------------------------------------------------------------------
79 //* \fn AT91F_PDC_DisableTx
80 //* \brief Disable transmit
81 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
82 void AT91F_PDC_DisableTx (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
83 {
84 pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
\ AT91F_PDC_DisableTx:
\ 00000000 801FA0E3 MOV R1,#+512
\ 00000004 201080E5 STR R1,[R0, #+32]
85 }
\ 00000008 1EFF2FE1 BX LR ;; return
86
87 //*----------------------------------------------------------------------------
88 //* \fn AT91F_PDC_DisableRx
89 //* \brief Disable receive
90 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
91 void AT91F_PDC_DisableRx (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
92 {
93 pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
\ AT91F_PDC_DisableRx:
\ 00000000 0210A0E3 MOV R1,#+2
\ 00000004 201080E5 STR R1,[R0, #+32]
94 }
\ 00000008 1EFF2FE1 BX LR ;; return
95
96 //*----------------------------------------------------------------------------
97 //* \fn AT91F_PDC_IsTxEmpty
98 //* \brief Test if the current transfer descriptor has been sent
99 //* \return return 1 if transfer is complete
100 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
101 int AT91F_PDC_IsTxEmpty (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
102 {
103 return !(pPDC->PDC_TCR);
\ AT91F_PDC_IsTxEmpty:
\ 00000000 0C0090E5 LDR R0,[R0, #+12]
\ 00000004 000050E3 CMP R0,#+0
\ 00000008 0100001A BNE ??AT91F_PDC_IsTxEmpty_0
\ 0000000C 0100A0E3 MOV R0,#+1
\ 00000010 000000EA B ??AT91F_PDC_IsTxEmpty_1
\ ??AT91F_PDC_IsTxEmpty_0:
\ 00000014 0000A0E3 MOV R0,#+0
\ ??AT91F_PDC_IsTxEmpty_1:
\ 00000018 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000001C 1EFF2FE1 BX LR ;; return
104 }
105
106 //*----------------------------------------------------------------------------
107 //* \fn AT91F_PDC_IsNextTxEmpty
108 //* \brief Test if the next transfer descriptor has been moved to the current td
109 //* \return return 1 if transfer is complete
110 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
111 int AT91F_PDC_IsNextTxEmpty (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
112 {
113 return !(pPDC->PDC_TNCR);
\ AT91F_PDC_IsNextTxEmpty:
\ 00000000 1C0090E5 LDR R0,[R0, #+28]
\ 00000004 000050E3 CMP R0,#+0
\ 00000008 0100001A BNE ??AT91F_PDC_IsNextTxEmpty_0
\ 0000000C 0100A0E3 MOV R0,#+1
\ 00000010 000000EA B ??AT91F_PDC_IsNextTxEmpty_1
\ ??AT91F_PDC_IsNextTxEmpty_0:
\ 00000014 0000A0E3 MOV R0,#+0
\ ??AT91F_PDC_IsNextTxEmpty_1:
\ 00000018 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000001C 1EFF2FE1 BX LR ;; return
114 }
115
116 //*----------------------------------------------------------------------------
117 //* \fn AT91F_PDC_IsRxEmpty
118 //* \brief Test if the current transfer descriptor has been filled
119 //* \return return 1 if transfer is complete
120 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
121 int AT91F_PDC_IsRxEmpty (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
122 {
123 return !(pPDC->PDC_RCR);
\ AT91F_PDC_IsRxEmpty:
\ 00000000 040090E5 LDR R0,[R0, #+4]
\ 00000004 000050E3 CMP R0,#+0
\ 00000008 0100001A BNE ??AT91F_PDC_IsRxEmpty_0
\ 0000000C 0100A0E3 MOV R0,#+1
\ 00000010 000000EA B ??AT91F_PDC_IsRxEmpty_1
\ ??AT91F_PDC_IsRxEmpty_0:
\ 00000014 0000A0E3 MOV R0,#+0
\ ??AT91F_PDC_IsRxEmpty_1:
\ 00000018 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000001C 1EFF2FE1 BX LR ;; return
124 }
125
126 //*----------------------------------------------------------------------------
127 //* \fn AT91F_PDC_IsNextRxEmpty
128 //* \brief Test if the next transfer descriptor has been moved to the current td
129 //* \return return 1 if transfer is complete
130 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
131 int AT91F_PDC_IsNextRxEmpty (AT91PS_PDC pPDC) // \arg pointer to a PDC controller
132 {
133 return !(pPDC->PDC_RNCR);
\ AT91F_PDC_IsNextRxEmpty:
\ 00000000 140090E5 LDR R0,[R0, #+20]
\ 00000004 000050E3 CMP R0,#+0
\ 00000008 0100001A BNE ??AT91F_PDC_IsNextRxEmpty_0
\ 0000000C 0100A0E3 MOV R0,#+1
\ 00000010 000000EA B ??AT91F_PDC_IsNextRxEmpty_1
\ ??AT91F_PDC_IsNextRxEmpty_0:
\ 00000014 0000A0E3 MOV R0,#+0
\ ??AT91F_PDC_IsNextRxEmpty_1:
\ 00000018 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000001C 1EFF2FE1 BX LR ;; return
134 }
135
136 //*----------------------------------------------------------------------------
137 //* \fn AT91F_PDC_Open
138 //* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
139 //*----------------------------------------------------------------------------
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