📄 pio.lst
字号:
###############################################################################
# #
# 08/Mar/2009 17:38:37 #
# IAR ANSI C/C++ Compiler V5.20.2.21007/W32 EVALUATION for ARM #
# Copyright 1999-2008 IAR Systems AB. #
# #
# Cpu mode = arm #
# Endian = little #
# Source file = E:\IAR\at91lib\peripherals\pio\pio.c #
# Command line = E:\IAR\at91lib\peripherals\pio\pio.c -D at91sam9260 -D #
# sdram -lC E:\IAR\at91sam9260-ek\basic-twi-eeprom-project #
# \ewp\at91sam9260_sdram\List\ --remarks --diag_suppress #
# Pe826,Pe1375 -o E:\IAR\at91sam9260-ek\basic-twi-eeprom-p #
# roject\ewp\at91sam9260_sdram\Obj\ --no_cse --no_unroll #
# --no_inline --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --endian=little #
# --cpu=ARM926EJ-S -e --fpu=None --dlib_config #
# "D:\Program Files\IAR Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\DLib_Config_Full.h" -I #
# E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\..\.. #
# \..\at91lib\ -I E:\IAR\at91sam9260-ek\basic-twi-eeprom-p #
# roject\ewp\..\..\..\at91lib\boards\at91sam9260-ek\ -I #
# E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\..\.. #
# \..\at91lib\peripherals\ -I #
# E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\..\.. #
# \..\at91lib\components\ -I E:\IAR\at91sam9260-ek\basic-t #
# wi-eeprom-project\ewp\..\..\..\at91lib\usb\ -I #
# "D:\Program Files\IAR Systems\Embedded Workbench 5.0 #
# Evaluation\ARM\INC\" --interwork --cpu_mode arm -On #
# List file = E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\at91s #
# am9260_sdram\List\pio.lst #
# Object file = E:\IAR\at91sam9260-ek\basic-twi-eeprom-project\ewp\at91s #
# am9260_sdram\Obj\pio.o #
# #
# #
###############################################################################
E:\IAR\at91lib\peripherals\pio\pio.c
1 /* ----------------------------------------------------------------------------
2 * ATMEL Microcontroller Software Support
3 * ----------------------------------------------------------------------------
4 * Copyright (c) 2008, Atmel Corporation
5 *
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * - Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the disclaimer below.
13 *
14 * Atmel's name may not be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
20 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
23 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 * ----------------------------------------------------------------------------
28 */
29
30 //------------------------------------------------------------------------------
31 // Headers
32 //------------------------------------------------------------------------------
33
34 #include "pio.h"
35 #include <board.h>
36
37 //------------------------------------------------------------------------------
38 // Internal definitions
39 //------------------------------------------------------------------------------
40 /// \internal Returns the current value of a register.
41 #define READ(peripheral, register) (peripheral->register)
42 /// \internal Modifies the current value of a register.
43 #define WRITE(peripheral, register, value) (peripheral->register = value)
44
45 //------------------------------------------------------------------------------
46 // Internal functions
47 //------------------------------------------------------------------------------
48 //------------------------------------------------------------------------------
49 /// Configures one or more pin(s) of a PIO controller as being controlled by
50 /// peripheral A. Optionally, the corresponding internal pull-up(s) can be
51 /// enabled.
52 /// \param pio Pointer to a PIO controller.
53 /// \param mask Bitmask of one or more pin(s) to configure.
54 /// \param enablePullUp Indicates if the pin(s) internal pull-up shall be
55 /// configured.
56 //------------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
57 static void PIO_SetPeripheralA(AT91S_PIO *pio,
58 unsigned int mask,
59 unsigned char enablePullUp)
60 {
61 // Disable interrupts on the pin(s)
62 WRITE(pio, PIO_IDR, mask);
\ PIO_SetPeripheralA:
\ 00000000 441080E5 STR R1,[R0, #+68]
63
64 // Enable the pull-up(s) if necessary
65 if (enablePullUp)
\ 00000004 FF2012E2 ANDS R2,R2,#0xFF ;; Zero extend
\ 00000008 000052E3 CMP R2,#+0
\ 0000000C 0100000A BEQ ??PIO_SetPeripheralA_0
66 WRITE(pio, PIO_PPUER, mask);
\ 00000010 641080E5 STR R1,[R0, #+100]
\ 00000014 000000EA B ??PIO_SetPeripheralA_1
67 else
68 WRITE(pio, PIO_PPUDR, mask);
\ ??PIO_SetPeripheralA_0:
\ 00000018 601080E5 STR R1,[R0, #+96]
69
70 // Configure pin
71 WRITE(pio, PIO_ASR, mask);
\ ??PIO_SetPeripheralA_1:
\ 0000001C 701080E5 STR R1,[R0, #+112]
72 WRITE(pio, PIO_PDR, mask);
\ 00000020 041080E5 STR R1,[R0, #+4]
73 }
\ 00000024 1EFF2FE1 BX LR ;; return
74
75 //------------------------------------------------------------------------------
76 /// Configures one or more pin(s) of a PIO controller as being controlled by
77 /// peripheral A. Optionally, the corresponding internal pull-up(s) can be
78 /// enabled.
79 /// \param pio Pointer to a PIO controller.
80 /// \param mask Bitmask of one or more pin(s) to configure.
81 /// \param enablePullUp Indicates if the pin(s) internal pull-up shall be
82 /// configured.
83 //------------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
84 static void PIO_SetPeripheralB(AT91S_PIO *pio,
85 unsigned int mask,
86 unsigned char enablePullUp)
87 {
88 // Disable interrupts on the pin(s)
89 WRITE(pio, PIO_IDR, mask);
\ PIO_SetPeripheralB:
\ 00000000 441080E5 STR R1,[R0, #+68]
90
91 // Enable the pull-up(s) if necessary
92 if (enablePullUp)
\ 00000004 FF2012E2 ANDS R2,R2,#0xFF ;; Zero extend
\ 00000008 000052E3 CMP R2,#+0
\ 0000000C 0100000A BEQ ??PIO_SetPeripheralB_0
93 WRITE(pio, PIO_PPUER, mask);
\ 00000010 641080E5 STR R1,[R0, #+100]
\ 00000014 000000EA B ??PIO_SetPeripheralB_1
94 else
95 WRITE(pio, PIO_PPUDR, mask);
\ ??PIO_SetPeripheralB_0:
\ 00000018 601080E5 STR R1,[R0, #+96]
96
97 // Configure pin
98 WRITE(pio, PIO_BSR, mask);
\ ??PIO_SetPeripheralB_1:
\ 0000001C 741080E5 STR R1,[R0, #+116]
99 WRITE(pio, PIO_PDR, mask);
\ 00000020 041080E5 STR R1,[R0, #+4]
100 }
\ 00000024 1EFF2FE1 BX LR ;; return
101
102
103 //*----------------------------------------------------------------------------
104 //* \fn AT91F_PIO_CfgPeriph
105 //* \brief Enable pins to be drived by peripheral
106 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
107 void PIO_CfgPeriph(AT91PS_PIO pPio, // \arg pointer to a PIO controller
108 unsigned int periphAEnable, // \arg PERIPH A to enable
109 unsigned int periphBEnable) // \arg PERIPH B to enable
110 {
111 pPio->PIO_ASR = periphAEnable;
\ PIO_CfgPeriph:
\ 00000000 701080E5 STR R1,[R0, #+112]
112 pPio->PIO_BSR = periphBEnable;
\ 00000004 742080E5 STR R2,[R0, #+116]
113 pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
\ 00000008 013092E1 ORRS R3,R2,R1
\ 0000000C 043080E5 STR R3,[R0, #+4]
114 }
\ 00000010 1EFF2FE1 BX LR ;; return
115
116
117 //*----------------------------------------------------------------------------
118 //* \fn AT91F_PIO_CfgOpendrain
119 //* \brief Configure PIO in open drain 配制 PIO 为开漏状态(多驱动)
120 //*----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
121 void PIO_CfgOpendrain(AT91PS_PIO pPio, // \arg pointer to a PIO controller
122 unsigned int multiDrvEnable) // \arg pio to be configured in open drain
123 {
124 // Configure the multi-drive option
125 pPio->PIO_MDDR = ~multiDrvEnable;
\ PIO_CfgOpendrain:
\ 00000000 0120F0E1 MVNS R2,R1
\ 00000004 542080E5 STR R2,[R0, #+84]
126 pPio->PIO_MDER = multiDrvEnable;
\ 00000008 501080E5 STR R1,[R0, #+80]
127 }
\ 0000000C 1EFF2FE1 BX LR ;; return
128
129
130 //------------------------------------------------------------------------------
131 /// Configures one or more pin(s) or a PIO controller as inputs. Optionally,
132 /// the corresponding internal pull-up(s) and glitch filter(s) can be
133 /// enabled.
134 /// \param pio Pointer to a PIO controller.
135 /// \param mask Bitmask indicating which pin(s) to configure as input(s).
136 /// \param enablePullUp Indicates if the internal pull-up(s) must be enabled.
137 /// \param enableFilter Indicates if the glitch filter(s) must be enabled.
138 //------------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
139 static void PIO_SetInput(AT91S_PIO *pio,
140 unsigned int mask,
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -