📄 twi.lst
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\ 0000009C 000491E1 ORRS R0,R1,R0, LSL #+8
\ 000000A0 400D90E3 ORRS R0,R0,#0x1000
\ 000000A4 040085E5 STR R0,[R5, #+4]
217
218 // Set internal address bytes
219 pTwi->TWI_IADR = iaddress;
\ 000000A8 0C7085E5 STR R7,[R5, #+12]
220
221 // Send START condition
222 pTwi->TWI_CR = AT91C_TWI_START;
\ 000000AC 0100A0E3 MOV R0,#+1
\ 000000B0 000085E5 STR R0,[R5, #+0]
223 }
\ 000000B4 F180BDE8 POP {R0,R4-R7,PC} ;; return
224
225
226 //-----------------------------------------------------------------------------
227 /// Reads a byte from the TWI bus. The read operation must have been started
228 /// using TWI_StartRead() and a byte must be available (check with
229 /// TWI_ByteReceived()).
230 /// Returns the byte read.
231 /// \param pTwi Pointer to an AT91S_TWI instance.
232 //-----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
233 unsigned char TWI_ReadByte(AT91S_TWI *pTwi)
234 {
\ TWI_ReadByte:
\ 00000000 10402DE9 PUSH {R4,LR}
\ 00000004 0040B0E1 MOVS R4,R0
235 SANITY_CHECK(pTwi);
\ 00000008 000054E3 CMP R4,#+0
\ 0000000C 0400001A BNE ??TWI_ReadByte_0
\ 00000010 EB20A0E3 MOV R2,#+235
\ 00000014 ........ LDR R1,??DataTable34 ;; `?<Constant "E:\\\\IAR\\\\at91lib\\\\periph...">`
\ 00000018 ........ LDR R0,??DataTable35 ;; `?<Constant "Sanity check failed a...">`
\ 0000001C ........ BL printf
\ ??TWI_ReadByte_1:
\ 00000020 FEFFFFEA B ??TWI_ReadByte_1
236
237 return pTwi->TWI_RHR;
\ ??TWI_ReadByte_0:
\ 00000024 300094E5 LDR R0,[R4, #+48]
\ 00000028 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000002C 1080BDE8 POP {R4,PC} ;; return
238 }
239
240
241 //-----------------------------------------------------------------------------
242 /// Sends a byte of data to one of the TWI slaves on the bus. This function
243 /// must be called once before TWI_StartWrite() with the first byte of data
244 /// to send, then it shall be called repeatedly after that to send the
245 /// remaining bytes.
246 /// \param pTwi Pointer to an AT91S_TWI instance.
247 /// \param byte Byte to send.
248 //-----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
249 void TWI_WriteByte(AT91S_TWI *pTwi, unsigned char byte)
250 {
\ TWI_WriteByte:
\ 00000000 38402DE9 PUSH {R3-R5,LR}
\ 00000004 0040B0E1 MOVS R4,R0
\ 00000008 0150B0E1 MOVS R5,R1
251 SANITY_CHECK(pTwi);
\ 0000000C 000054E3 CMP R4,#+0
\ 00000010 0400001A BNE ??TWI_WriteByte_0
\ 00000014 FB20A0E3 MOV R2,#+251
\ 00000018 ........ LDR R1,??DataTable34 ;; `?<Constant "E:\\\\IAR\\\\at91lib\\\\periph...">`
\ 0000001C ........ LDR R0,??DataTable35 ;; `?<Constant "Sanity check failed a...">`
\ 00000020 ........ BL printf
\ ??TWI_WriteByte_1:
\ 00000024 FEFFFFEA B ??TWI_WriteByte_1
252
253 pTwi->TWI_THR = byte;
\ ??TWI_WriteByte_0:
\ 00000028 0500B0E1 MOVS R0,R5
\ 0000002C FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 00000030 340084E5 STR R0,[R4, #+52]
254 }
\ 00000034 3180BDE8 POP {R0,R4,R5,PC} ;; return
255
256 //-----------------------------------------------------------------------------
257 /// Starts a write operation on the TWI to access the selected slave, then
258 /// returns immediately. A byte of data must be provided to start the write;
259 /// other bytes are written next.
260 /// \param pTwi Pointer to an AT91S_TWI instance.
261 /// \param address Address of slave to acccess on the bus.
262 /// \param iaddress Optional slave internal address.
263 /// \param isize Number of internal address bytes.
264 /// \param byte First byte to send.
265 //-----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
266 void TWI_StartWrite(AT91S_TWI *pTwi,
267 unsigned char address,
268 unsigned int iaddress,
269 unsigned char isize,
270 unsigned char byte)
271 {
\ TWI_StartWrite:
\ 00000000 F0412DE9 PUSH {R4-R8,LR}
\ 00000004 0050B0E1 MOVS R5,R0
\ 00000008 0160B0E1 MOVS R6,R1
\ 0000000C 0270B0E1 MOVS R7,R2
\ 00000010 0340B0E1 MOVS R4,R3
\ 00000014 1880DDE5 LDRB R8,[SP, #+24]
272 trace_LOG(trace_DEBUG, "-D- TWI_StartWrite()\n\r");
273 SANITY_CHECK(pTwi);
\ 00000018 000055E3 CMP R5,#+0
\ 0000001C 0500001A BNE ??TWI_StartWrite_0
\ 00000020 1120A0E3 MOV R2,#+17
\ 00000024 402F82E3 ORR R2,R2,#0x100
\ 00000028 ........ LDR R1,??DataTable34 ;; `?<Constant "E:\\\\IAR\\\\at91lib\\\\periph...">`
\ 0000002C ........ LDR R0,??DataTable35 ;; `?<Constant "Sanity check failed a...">`
\ 00000030 ........ BL printf
\ ??TWI_StartWrite_1:
\ 00000034 FEFFFFEA B ??TWI_StartWrite_1
274 SANITY_CHECK((address & 0x80) == 0);
\ ??TWI_StartWrite_0:
\ 00000038 800016E3 TST R6,#0x80
\ 0000003C 0500000A BEQ ??TWI_StartWrite_2
\ 00000040 1220A0E3 MOV R2,#+18
\ 00000044 402F82E3 ORR R2,R2,#0x100
\ 00000048 ........ LDR R1,??DataTable34 ;; `?<Constant "E:\\\\IAR\\\\at91lib\\\\periph...">`
\ 0000004C ........ LDR R0,??DataTable35 ;; `?<Constant "Sanity check failed a...">`
\ 00000050 ........ BL printf
\ ??TWI_StartWrite_3:
\ 00000054 FEFFFFEA B ??TWI_StartWrite_3
275 SANITY_CHECK((iaddress & 0xFF000000) == 0);
\ ??TWI_StartWrite_2:
\ 00000058 FF0417E3 TST R7,#0xFF000000
\ 0000005C 0500000A BEQ ??TWI_StartWrite_4
\ 00000060 1320A0E3 MOV R2,#+19
\ 00000064 402F82E3 ORR R2,R2,#0x100
\ 00000068 ........ LDR R1,??DataTable34 ;; `?<Constant "E:\\\\IAR\\\\at91lib\\\\periph...">`
\ 0000006C ........ LDR R0,??DataTable35 ;; `?<Constant "Sanity check failed a...">`
\ 00000070 ........ BL printf
\ ??TWI_StartWrite_5:
\ 00000074 FEFFFFEA B ??TWI_StartWrite_5
276 SANITY_CHECK(isize < 4);
\ ??TWI_StartWrite_4:
\ 00000078 FF4014E2 ANDS R4,R4,#0xFF ;; Zero extend
\ 0000007C 040054E3 CMP R4,#+4
\ 00000080 0400003A BCC ??TWI_StartWrite_6
\ 00000084 452FA0E3 MOV R2,#+276
\ 00000088 ........ LDR R1,??DataTable34 ;; `?<Constant "E:\\\\IAR\\\\at91lib\\\\periph...">`
\ 0000008C ........ LDR R0,??DataTable35 ;; `?<Constant "Sanity check failed a...">`
\ 00000090 ........ BL printf
\ ??TWI_StartWrite_7:
\ 00000094 FEFFFFEA B ??TWI_StartWrite_7
277
278 // Set slave address and number of internal address bytes
279 pTwi->TWI_MMR = (isize << 8) | (address << 16);
\ ??TWI_StartWrite_6:
\ 00000098 0400B0E1 MOVS R0,R4
\ 0000009C FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 000000A0 0610B0E1 MOVS R1,R6
\ 000000A4 FF1011E2 ANDS R1,R1,#0xFF ;; Zero extend
\ 000000A8 0118B0E1 LSLS R1,R1,#+16
\ 000000AC 000491E1 ORRS R0,R1,R0, LSL #+8
\ 000000B0 040085E5 STR R0,[R5, #+4]
280
281 // Set internal address bytes
282 pTwi->TWI_IADR = iaddress;
\ 000000B4 0C7085E5 STR R7,[R5, #+12]
283
284 // Write first byte to send
285 TWI_WriteByte(pTwi, byte);
\ 000000B8 0810B0E1 MOVS R1,R8
\ 000000BC FF1011E2 ANDS R1,R1,#0xFF ;; Zero extend
\ 000000C0 0500B0E1 MOVS R0,R5
\ 000000C4 ........ BL TWI_WriteByte
286 }
\ 000000C8 F081BDE8 POP {R4-R8,PC} ;; return
287
288 //-----------------------------------------------------------------------------
289 /// Returns 1 if a byte has been received and can be read on the given TWI
290 /// peripheral; otherwise, returns 0. This function resets the status register
291 /// of the TWI.
292 /// \param pTwi Pointer to an AT91S_TWI instance.
293 //-----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
294 unsigned char TWI_ByteReceived(AT91S_TWI *pTwi)
295 {
296 return ((pTwi->TWI_SR & AT91C_TWI_RXRDY) == AT91C_TWI_RXRDY);
\ TWI_ByteReceived:
\ 00000000 200090E5 LDR R0,[R0, #+32]
\ 00000004 020010E3 TST R0,#0x2
\ 00000008 0100000A BEQ ??TWI_ByteReceived_0
\ 0000000C 0100A0E3 MOV R0,#+1
\ 00000010 000000EA B ??TWI_ByteReceived_1
\ ??TWI_ByteReceived_0:
\ 00000014 0000A0E3 MOV R0,#+0
\ ??TWI_ByteReceived_1:
\ 00000018 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000001C 1EFF2FE1 BX LR ;; return
297 }
298
299 //-----------------------------------------------------------------------------
300 /// Returns 1 if a byte has been sent, so another one can be stored for
301 /// transmission; otherwise returns 0. This function clears the status register
302 /// of the TWI.
303 /// \param pTwi Pointer to an AT91S_TWI instance.
304 //-----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
305 unsigned char TWI_ByteSent(AT91S_TWI *pTwi)
306 {
307 return ((pTwi->TWI_SR & AT91C_TWI_TXRDY) == AT91C_TWI_TXRDY);
\ TWI_ByteSent:
\ 00000000 200090E5 LDR R0,[R0, #+32]
\ 00000004 040010E3 TST R0,#0x4
\ 00000008 0100000A BEQ ??TWI_ByteSent_0
\ 0000000C 0100A0E3 MOV R0,#+1
\ 00000010 000000EA B ??TWI_ByteSent_1
\ ??TWI_ByteSent_0:
\ 00000014 0000A0E3 MOV R0,#+0
\ ??TWI_ByteSent_1:
\ 00000018 FF0010E2 ANDS R0,R0,#0xFF ;; Zero extend
\ 0000001C 1EFF2FE1 BX LR ;; return
308 }
309
310 //-----------------------------------------------------------------------------
311 /// Returns 1 if the current transmission is complete (the STOP has been sent);
312 /// otherwise returns 0.
313 /// \param pTwi Pointer to an AT91S_TWI instance.
314 //-----------------------------------------------------------------------------
\ In section .text, align 4, keep-with-next
315 unsigned char TWI_TransferComplete(AT91S_TWI *pTwi)
316 {
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