ibmlpt.txt

Parallel Port description of the communication port

table is described in the Soft Addresses section above.

To control the printer via the BIOS, call INT 17 with the printer number in
DX (0 to 3, indexing into the four entry table at 0x408 mentioned in the
Soft Addresses section above), and the desired function in AH.  Functions:

  AH = 0: print the character in AL
  AH = 1: reinitialize the port, return status in AH
  AH = 2: return status in AH

BIOS operation notes follow.

The BIOS normally keeps the Control register value as 0x0C:
        C5 = 0  =>  output enabled (for bidirectional only)
        C4 = 0  =>  IRQ disabled
        C3 = 1  =>  -Select pin low    (Printer Selected)
        C2 = 1  =>  -Init pin high     (Printer not being initialized)
        C1 = 0  =>  -AutoFeed pin high (No Auto Feed)
        C0 = 0  =>  -Strobe pin high   (No Stobe)

The BIOS prints a character (function AH = 0) as follows:
   (Uses only  Status in S7/+Busy and Control out C0/-Strobe)
   Write character to Data Out (D0-D7)
   Wait for bit S7 to go to 1 (-Busy pin to go high/low?)
      Timeout and return if this takes too long
   Set C0 to 1 for a few microseconds (-Strobe pin pulsed low)

   This assumes that the printer was already ready.

The BIOS handles reinitializing the printer (function AH = 1) thus:
   Set C2 = 0 for a few hundred microseconds (-Init pin pulsed low)

The BIOS returns status in AH (functions AH = 1 or 2) is as follows:

 __________________________________
 | 7 | 6 | 5 | 4 | 3 | 2  | 1 | 0 |
   |   |   |   |   |  not used  |___ 1 = "Time Out" (software)
   |   |   |   |   |________________ 1 = "I/O Error" (inv C3+; -Error pin low)
   |   |   |   |____________________ 1 = "Selected"  (C4+; +SelectIn pin high)
   |   |   |________________________ 1 = "Paper Out" (C5+; +PaperEnd pin high)
   |   |____________________________ 1 = "Acknowledge" (inv C6+; -Ack pin low)
   |________________________________ 1 = "Not Busy"  (C7-; +Busy pin low)

 The high 5 bits of this are essentially the Status In register from the
 printer port, with bits 6 and 3 inverted (ie: XORed with 0x48).  The low
 bit is generated by BIOS software after a timeout.  In the original PC,
 timeout delays were generated by delay loops.

10. IRQ's

The primary IBM Printer Adapter (base 0x378) and the IBM Monochrome Display
and Printer Adapter (base 0x3BC) are allocated hardware interrupt 7 (IRQ 7),
which is wired to INT 0x0F.  If bit C4 of the Control Out register is high,
then input line "-ACK" (DB 25 pin 10, Status Register bit S6) will be wired
to the IRQ 7 bus line.  A rising edge (low to high) on -Acknowledge will be
cause a rising edge on IRQ 7, which will trigger an interrupt if that IRQ is
enabled in the 8259 interrupt controller chip.  (Note: the MCA bus is level
sensitive rather than edge triggered).  Both cards use the same interrupt,
and the ISA bus does not share interrupts correctly, so no more than one
of these ports should be enabled at the same time (or the 74LS125 chips
driving the PC bus will fight).

Secondary Printer Adapters (base 0x278) are supposed to use IRQ 5 (INT 0x0D)
for their interrupt; note that on the PC (pre-AT) this would have conflicted
with the floppy disk controller.  This IRQ is even more commonly "stolen"
for other usage: EGA, soundcards, network cards, etc.

The idea was apparently to use this IRQ as part of the printer driver, much
as the serial port IRQs can be used as part of comm drivers.  Unfortunately,
typical timing on printers did not allow this, so most (nearly all) DOS
software does not use the printer port IRQ for driving printers.  It's often
considered "up for grabs" and some soundcards like to use IRQ 7.  Some other
operating systems may use it for the printer port, as may some parallel port
transfer programs.

11. Bidirectional Ports

The IBM PS/2 series added one feature to the parallel ports: bidirectional
support.  This was done by using one more bit in the Control Out register
to control tristating of the Data Out port.  When bit C5 is 0, the Data
Out port operates as it did for earlier parallel ports (driver enabled);
when C5 is set to 1, though, the Data Out port is tristated, which means
that it is essentially electically disconnected from the pins (high
impedance state), not driving them high nor low.  This allows the data
feedback register to correctly read any externally applied TTL signals
on the corresponding data pins, effectively making this an input port.

Interestingly, the original IBM Printer Adapter, and many early clones,
had everything needed to become bidirectional.  The 74LS374 chip has a
chip enable pin which can tristate the 8 data outputs, but it is usually
wired to ground to always enable the output drivers.  The 74LS174
latch used for C0-C4 is actually a hex latch and processor data bus line
5 is attached to the sixth latch input; that bit IS latched when you
write to the Control Out register - but the output (Q6 on the 74LS174)
is not used by anything.  If you cut the trace from pin 1 (/OE) of the
74LS374 to ground, and connect this pin instead to pin 15 (Q6) of
the 74LS174, voila - you have a PS/2 compatible bidirectional parallel
port.  This only works on the older discrete TTL parallel ports, including
the IBM Printer Adapter and at least some clones of that era.  One theory
is that IBM had a bidirectional port in mind initially, but decided to
omit that aspect at the last moment (even while still latching the C5
bit from the processor into the LS174 hex latch).

There are now PS/2 compatible third party bidirectional parallel ports.
The cost for a TTL bidirectional port should have been identical, but now
that parallel ports are done with one LSI chip (or a fraction of one), this
will require an appropriate LSI chip.  Apparently some of them now have
bidirectional ports, some do not.

Note that some people have for many years been using the standard (not
bidirectional) data out port as an input port.  They output data 0xFF,
that is, all high.  Any pins which are externally pulled low via TTL or
switches will probably read as low (0) in the data feedback register,
because TTL low (sinking current) tends to be stronger than TTL high
(sourcing current), and tend to "win" when there two drivers fighting on
the same line.  An external high signal, or no signal, will allow the
pin (and data bit) to remain high (1).  This is NOT reccommended, as it
stresses the 74LS374 (or equivalent) beyond its safe margins and could
cause chip failure.  However, some people report doing this for years
without problem.  Note that all recent parallel ports are implemented
with single chip LSI controllers rather than the MSI TTL originals, which
means that they may have different drive capacities, electical margins,
and replacement costs, should you attempt this approach.  Sometimes the
LSI controller also includes other functions, such as serial ports or a
monochrome display port; if it overheats, more than just the parallel
port could be damaged.  Beware.  However, if you have an old TTL parallel
port (with a 74LS374 chip, preferably socketed), it may be easy and cheap
to replace if that chip should die.

I bought TTL parallel port card clones, fully socketed (all chips!), for
about $15 mail order about 5 years ago.  The bidirectional conversion was
a trace cut and a wire jumper.  The 74LS374 was easily replaced, if it
were damaged or if one wanted a better chip like the 74ACT374.  You could
even strap it for any base address (including non standard ones, so as not
to conflict).  I wish I could get more; there must have been scads of these
on the market.  You may find old TTL printer ports used; latch onto them
if you want to experiment with parallel port interfaces (pun acknowledged).

One last electrical note: if you use any sort of bidirectional parallel port
for inputs, be sure to tristate it whenever it is connected to external
devices which will drive it.  When I'm running it this way, I put a small
routine in my autoexec.bat which tristates the port in question on every
bootup.  Or use inline resistors to at least limit the current to a safe
value.

Steven M. Scharf <[e-mail]> notes that some higher end parallel
port chips "lock" the direction control bit C5 to keep certain naive software
from accidentally changing the port direction.  In particular, he says that
"PTR bit 7" of the National Semiconductor SuperI/O chip must be 1 before you
can change the direction control bit.  I don't have documentation on this
chip, so I'm not sure what register PTR is; for now, consider this just a
warning.  He says that other chips may lock the direction control
differently.

12. Enhanced Ports

There are at least two specs for further enhanced parallel ports, the EPP
(Enhanced Parallel Port) and the ECP (Enhanced Capability Port), with the
latter being more ambitious.  I would appreciate any specs that can be
forwarded to me (or references) on either of these.


Steven M. Scharf <[e-mail]> gave this table:

 Different Parallel Ports on NSC Parts
 --------------------------------------------------------
 PC87311 Bidirectional Parallel Port (16450 UARTS)
 PC87312 Bidirectional Parallel Port (16550 UARTS)
 PC87322 Enhanced Parallel Port (EPP) (16550 UARTS)*
 PC87332 Enhanced Capabilities Port (ECP) also EPP 1.7 and 1.9 (16550 UARTS)*

 *Floppy controller signals can be redirected out the parallel port pins
 via an internal multiplexor. This feature is used in some sub-notebooks
 with external floppy drives

13. Copy Protection Dongles

(From info provided by Steven M. Scharf <[e-mail]>)

Copy protection dongles typically watch the data lines for patterns of
data without any -strobe signal (pin 1, controlled by C0-).  That is, the
copy protection software writes various patterns to the data lines without
every pulsing the -strobe line.  Without a pulse on -strobe, any printer
also attached to the port should ignore this data.  Not all dongles work
on all ports; this strobeless method is a bit more temperamental than
regular printer output.

Steven M. Scharf: "I heard one dongle manufacturer complain to me about
a parallel port from Taiwan that tristated all the data lines between
every write to the data lines. This presented a pattern of FF to the dongle,
but had no effect on the printer since there was no strobe. In this case
the software was writing a sequence of bytes to the dongle and it didn't
work due to the FF in between each expected real byte."

"The dongle also draws power from the signal lines--a definite no-no.
Dongles should be designed to operate all the way down to the minimum TTL
low or at least to minimum Vout High of 2.4V. If your dongle doesn't work
but your printer works fine then it is almost certainly the fault of the
dongle--not the parallel port. Software with an incompatible dongle to the
parallel port on a machine will not be usable on that machine--one more
reason to not penalize the legitimate buyers of software."

14. Other devices:

From: [e-mail] (George Pontis)

"Another area that might be of interest in your document would be some
comment on the parallel port extenders. I have a xmit/rcv pair from LinkSys
that I bought from Fry's Electronics for about $70. They convert the parallel
signal to a serial data stream, using the signal and control lines for power.
My set was working fine until I added a hardware dongle for an expensive
Windows application. Then, printing ceased to work reliably. I took the
transmitter apart and partially traced the schematic. They have used 7
diodes to suck power from pins 13, 14, 15, 17, 1, 2, and 3.  Also, they
connected pins 15 (ERR) to 16 (INIT). The strobe line is coupled in to a
flip-flop, which starts clocking the parallel loaded data."

Comment from Zhahai - with both a dongle and a parallel port extender trying
to draw power from the port's data or control (not power) lines, it's not
surprising if things don't always work!  It must be really pushing the specs.

15. Transferring Data Via Ports

There are three basic ways to wire IBM printer ports together to transfer
data between them.  The most common is to wire D0 - D4 (or D3-D7) from one
port to S3 - S7 from the other port, and vice versa.  In this way, 4 bits of
data can be put out by one (eg: D0 - D3) and read by the other (eg: S3 - S6);
the other bit (eg: D4/S7) can be used for synchronizing (eg: Data Ready).
If data is transferring one way, the Dn/Sn path the other direction can be
used for acknowledgements.  In this scheme, you must remember that S3 - S6
read the inverse of the other computer's D0 - D3 data bits, but S7 has the
same value as D4 (or D3 - D6 and D7 respectively, for the alternate wiring).
Also remember that S6 and S7's mapping to pins is swapped in order from the
others.

16. Transfer Modes and Cables

Mode 1A: nibble mode, using Data Out to Status In connection
 This version works with all parallel ports; commercial xfer software style.

       Side 1   Pin     dir     Pin    Side 2   connection
       ------   ---     ---     ---    ------   ----------
        D0       2       =>     15      S3+     direct
        D1       3       =>     13      S4+     direct
        D2       4       =>     12      S5+     direct
        D3       5       =>     10      S6+     direct
        D4       6       =>     11      S7-     inverted

        S7-     11      <=       6      D4      inverted
        S6+     10      <=       5      D3      direct
        S5+     12      <=       4      D2      direct
        S4+     13      <=       3      D1      direct
        S3+     15      <=       2      D0      direct

        Gnd     25      ===     25      Gnd     (ground)

Mode 1B: nibble mode, using Data Out to Status In connection
 This version works with all parallel ports; bit positions matched.

       Side 1   Pin     dir     Pin    Side 2   connection
       ------   ---     ---     ---    ------   ----------