f2812_varitek19_ram_lnk.cmd

laboratorio 1 de cc composer

/*
//###########################################################################
//
// FILE:    F2812_EzDSP_RAM_lnk.cmd
//
// TITLE:   Linker Command File For F2812 eZdsp examples that run out of RAM
//          This linker file assumes the user is booting up in Jump to H0 mode
//
//###########################################################################
//
//  Ver | dd mmm yyyy | Who  | Description of changes
// =====|=============|======|===============================================
//  1.00| 11 Sep 2003 | L.H. | Changes since previous version (v.58 Alpha)
//      |             |      | Added BEGIN section to the start of H0
//      |             |      | Removed .bss, .const and .sysmem
//      |             |      |    These are for a small memory model.  All examples
//      |             |      |    use the large model.
//      |             |      | Added .esysmem section
//      |             |      | Changed ramfuncs section to load and run from RAM
//      |             |      |    (previously this was type DSECT)
//      |             |      | Moved peripheral register files to DSP28_Headers_BIOS.cmd
//      |             |      |    and DSP28_Headers_nonBIOS.cmd
//      |             |      | Added CSM_RSVD memory section in FLASHA - this region
//      |             |      |    should be programmed with all 0x0000 when using the CSM
// -----|-------------|------|-----------------------------------------------
//###########################################################################
*/

/* ======================================================
// For Code Composer Studio V2.2 and later
// ---------------------------------------
// In addition to this memory linker command file, 
// add the header linker command file directly to the project. 
// The header linker command file is required to link the
// peripheral structures to the proper locations within 
// the memory map.
//
// The header linker files are found in <base>\DSP281x_Headers\cmd
//   
// For BIOS applications add:      DSP281x_Headers_nonBIOS.cmd
// For nonBIOS applications add:   DSP281x_Headers_nonBIOS.cmd    
========================================================= */

/* ======================================================
// For Code Composer Studio prior to V2.2
// --------------------------------------
// 1) Use one of the following -l statements to include the 
// header linker command file in the project. The header linker
// file is required to link the peripheral structures to the proper 
// locations within the memory map                                    */

/* Uncomment this line to include file only for non-BIOS applications */
/* -l DSP281x_Headers_nonBIOS.cmd */

/* Uncomment this line to include file only for BIOS applications */
/* -l DSP281x_Headers_BIOS.cmd */

/* 2) In your project add the path to <base>\DSP281x_headers\cmd to the
   library search path under project->build options, linker tab, 
   library search path (-i).
/*========================================================= */



MEMORY
{
PAGE 0 :
   /* For this example, H0 is split between PAGE 0 and PAGE 1 */  
   /* BEGIN is used for the "boot to HO" bootloader mode      */
   /* RESET is loaded with the reset vector only if           */
   /* the boot is from XINTF Zone 7.  Otherwise reset vector  */
   /* is fetched from boot ROM. See .reset section below      */
   PEXTERNA    : origin = 0x130000, length = 0x10000     /* XINTF zone 6 MEMORIA EXTERNA 1MB o 512KW*/
   RAMM0      : origin = 0x000000, length = 0x000400
   ZONE0       : origin = 0x002000, length = 0x002000     /* XINTF zone 0 */
   ZONE1       : origin = 0x004000, length = 0x002000     /* XINTF zone 1 */
   L0RAM  : origin = 0x008000, length = 0x001000
   /*ZONE2       : origin = 0x080000, length = 0x080000*/     /* XINTF zone 2 */
   OTP         : origin = 0x3D7800, length = 0x000800     /* on-chip OTP */
   FLASHJ  (X) : origin = 0x3D8000, length = 0x002000     /* on-chip FLASH */
   FLASHI  (X) : origin = 0x3DA000, length = 0x002000     /* on-chip FLASH */
   FLASHH      : origin = 0x3DC000, length = 0x004000     /* on-chip FLASH */
   FLASHG      : origin = 0x3E0000, length = 0x004000     /* on-chip FLASH */
   FLASHF      : origin = 0x3E4000, length = 0x004000     /* on-chip FLASH */
   FLASHE      : origin = 0x3E8000, length = 0x004000     /* on-chip FLASH */
   FLASHD      : origin = 0x3EC000, length = 0x004000     /* on-chip FLASH */
   FLASHC      : origin = 0x3F0000, length = 0x004000     /* on-chip FLASH */
   FLASHB      : origin = 0x3F4000, length = 0x002000     /* on-chip FLASH */
   FLASHA      : origin = 0x3F6000, length = 0x001FF6     /* on-chip FLASH */
   BEGINFLASHA : origin = 0x3F7FF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
   /* ZONE7       : origin = 0x3FC000, length = 0x003FC0     /* XINTF zone 7 available if MP/MCn=1 */ 
    
   BEGIN      : origin = 0x3F8000, length = 0x000002       
   PRAMH0     : origin = 0x3F8002, length = 0x001FFE
   BOOTROM    : origin = 0x3FF000, length = 0x000FC0
   RESET      : origin = 0x3FFFC0, length = 0x000002           
   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM (MP/MCn=0) or XINTF zone 7 (MP/MCn=1) */

         
PAGE 1 : 
   RAMM1   	: origin = 0x000400, length = 0x000400
   L1RAM  	: origin = 0x009000, length = 0x001000
   DEXTERNA    : origin = 0x100000, length = 0x040000     /* XINTF zone 6 MEMORIA EXTERNA 1MB o 512KW*/
   /*DRAMH0   : origin = 0x3F9500, length = 0x000B00  */      

}
 
 
SECTIONS
{
   codestart        : > BEGIN,       PAGE = 0
   ramfuncs         : > PRAMH0,     PAGE = 0  
   .text 			: > PRAMH0, 		PAGE = 0  
   .cinit           : > L0RAM,      	PAGE = 0
   .pinit           : > PRAMH0,      	PAGE = 0
   .switch          : > RAMM0,       	PAGE = 0 /*no usar RAMM0 para que no se cruce con Colcacode*/
   .reset           : > RESET,      	PAGE = 0, TYPE = DSECT /* not used, */
   .sysmem         	: > L1RAM,     PAGE = 1
   .stack           : > RAMM1,       	PAGE = 1
   .cio           	: > RAMM1,       	PAGE = 1
   .ebss            : > DEXTERNA,      	PAGE = 1
   .econst          : > L1RAM,     PAGE = 1      
   .esysmem         : > L1RAM,      	PAGE = 1

   /*==========================================================*/
   /* Tables for IQ math functions:                            */
   /*==========================================================*/
   IQmathTables  : load = BOOTROM, type = NOLOAD, PAGE = 0     

   /*==========================================================*/
   /* IQ math functions:                                       */
   /*==========================================================*/
   IQmath       : load = L0RAM,   		PAGE = 0
   Datos		: > DEXTERNA,			PAGE = 1
}