📄 f31x_smbus_slave.c
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//-----------------------------------------------------------------------------
// F31x_SMBus_Slave.c
//-----------------------------------------------------------------------------
// Copyright 2006 Silicon Laboratories, Inc.
// http://www.silabs.com
//
// Program Description:
//
// Example software to demonstrate the C8051F30x SMBus interface in Slave mode
// - Interrupt-driven SMBus implementation
// - Only slave states defined
// - 1-byte SMBus data holder used for both transmit and receive
// - Timer1 used as SMBus clock rate (used only for free timeout detection)
// - Timer3 used by SMBus for SCL low timeout detection
// - ARBLOST support included
// - Pinout:
// P0.0 -> SDA (SMBus)
// P0.1 -> SCL (SMBus)
//
// P3.0 -> C2D (debugging interface)
//
// P3.3 -> LED (on the 'F310 TB)
//
// all other port pins unused
//
// How To Test:
//
// 1) Download code to a 'F31x device that is connected to a SMBus master.
// 2) Run the code. The slave code will write data and read data from the
// same data byte, so a successive write and read will effectively echo the
// data written. To verify that the code is working properly, verify on the
// master that the data written is the same as the data received.
//
//
// FID: 31X000004
// Target: C8051F31x
// Tool chain: Keil C51 7.50 / Keil EVAL C51
// Command Line: None
//
// Release 1.0
// -Initial Revision (TP)
// -02 MAR 2006
//
//-----------------------------------------------------------------------------
// Includes
//-----------------------------------------------------------------------------
#include <C8051F310.h>
//-----------------------------------------------------------------------------
// Global Constants
//-----------------------------------------------------------------------------
#define SYSCLK 24500000 // System clock frequency in Hz
#define SMB_FREQUENCY 10000 // Target SMBus frequency
// This example supports between 10kHz
// and 100kHz
#define WRITE 0x00 // SMBus WRITE command
#define READ 0x01 // SMBus READ command
#define SLAVE_ADDR 0xF0 // Device addresses (7 bits,
// lsb is a don't care)
// Status vector - top 4 bits only
#define SMB_SRADD 0x20 // (SR) slave address received
// (also could be a lost
// arbitration)
#define SMB_SRSTO 0x10 // (SR) STOP detected while SR or ST,
// or lost arbitration
#define SMB_SRDB 0x00 // (SR) data byte received, or
// lost arbitration
#define SMB_STDB 0x40 // (ST) data byte transmitted
#define SMB_STSTO 0x50 // (ST) STOP detected during a
// transaction; bus error
// End status vector definition
//-----------------------------------------------------------------------------
// Global VARIABLES
//-----------------------------------------------------------------------------
unsigned char SMB_DATA; // Global holder for SMBus data.
// All receive data is written
// here;
// all transmit data is read
// from here
bit DATA_READY = 0; // Set to '1' by the SMBus ISR
// when a new data byte has been
// received.
// 16-bit SFR declarations
sfr16 TMR3RL = 0x92; // Timer3 reload registers
sfr16 TMR3 = 0x94; // Timer3 counter registers
sbit LED = P3^3; // LED on port P3.3
//-----------------------------------------------------------------------------
// Function PROTOTYPES
//-----------------------------------------------------------------------------
void SMBus_Init (void);
void Timer1_Init (void);
void Timer3_Init (void);
void Port_Init (void);
void SMBus_ISR (void);
void Timer3_ISR (void);
//-----------------------------------------------------------------------------
// MAIN Routine
//-----------------------------------------------------------------------------
//
// Main routine performs all configuration tasks, then waits for SMBus
// communication.
//
void main (void)
{
PCA0MD &= ~0x40; // WDTE = 0 (Disable watchdog
// timer)
OSCICN |= 0x03; // Set internal oscillator to highest
// setting of 24500000
Port_Init(); // Initialize Crossbar and GPIO
Timer1_Init(); // Configure Timer1 for use
// with SMBus baud rate
Timer3_Init (); // Configure Timer for use with
// SCL low timeout detect
SMBus_Init (); // Configure and enable SMBus
EIE1 |= 0x01; // Enable the SMBus interrupt
LED = 0;
EA = 1; // Global interrupt enable
SMB_DATA = 0xFD; // Initialize SMBus data holder
while(1)
{
while(!DATA_READY); // New SMBus data received?
DATA_READY = 0;
LED = ~LED;
}
}
//-----------------------------------------------------------------------------
// Initialization Routines
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// SMBus_Init()
//-----------------------------------------------------------------------------
//
// Return Value : None
// Parameters : None
//
// SMBus configured as follows:
// - SMBus enabled
// - Slave mode not inhibited
// - Timer1 used as clock source. The maximum SCL frequency will be
// approximately 1/3 the Timer1 overflow rate
// - Setup and hold time extensions enabled
// - Bus Free and SCL Low timeout detection enabled
//
void SMBus_Init (void)
{
SMB0CF = 0x1D; // Use Timer1 overflows as SMBus clock
// source;
// Enable slave mode;
// Enable setup & hold time
// extensions;
// Enable SMBus Free timeout detect;
// Enable SCL low timeout detect;
SMB0CF |= 0x80; // Enable SMBus;
}
//-----------------------------------------------------------------------------
// Timer1_Init()
//-----------------------------------------------------------------------------
//
// Return Value : None
// Parameters : None
//
// Timer1 configured as the SMBus clock source as follows:
// - Timer1 in 8-bit auto-reload mode
// - SYSCLK or SYSCLK / 4 as Timer1 clock source
// - Timer1 overflow rate => 3 * SMB_FREQUENCY
// - The resulting SCL clock rate will be ~1/3 the Timer1 overflow rate
// - Timer1 enabled
//
void Timer1_Init (void)
{
// Make sure the Timer can produce the appropriate frequency in 8-bit mode
// Supported SMBus Frequencies range from 10kHz to 100kHz. The CKCON register
// settings may need to change for frequencies outside this range.
#if ((SYSCLK/SMB_FREQUENCY/3) < 255)
#define SCALE 1
CKCON |= 0x08; // Timer1 clock source = SYSCLK
#elif ((SYSCLK/SMB_FREQUENCY/4/3) < 255)
#define SCALE 4
CKCON |= 0x01;
CKCON &= ~0x0A; // Timer1 clock source = SYSCLK / 4
#endif
TMOD = 0x20; // Timer1 in 8-bit auto-reload mode
// Timer1 configured to overflow at 1/3 the rate defined by SMB_FREQUENCY
TH1 = -(SYSCLK/SMB_FREQUENCY/SCALE/3);
TL1 = TH1; // Init Timer1
TR1 = 1; // Timer1 enabled
}
//-----------------------------------------------------------------------------
// Timer3_Init()
//-----------------------------------------------------------------------------
//
// Return Value : None
// Parameters : None
//
// Timer3 configured for use by the SMBus low timeout detect feature as
// follows:
// - Timer3 in 16-bit auto-reload mode
// - SYSCLK/12 as Timer3 clock source
// - Timer3 reload registers loaded for a 25ms overflow period
// - Timer3 pre-loaded to overflow after 25ms
// - Timer3 enabled
//
void Timer3_Init (void)
{
TMR3CN = 0x00; // Timer3 configured for 16-bit auto-
// reload, low-byte interrupt disabled
CKCON &= ~0x40; // Timer3 uses SYSCLK/12
TMR3RL = -(SYSCLK/12/40); // Timer3 configured to overflow after
TMR3 = TMR3RL; // ~25ms (for SMBus low timeout detect):
// 1/.025 = 40
EIE1 |= 0x80; // Timer3 interrupt enable
TMR3CN |= 0x04; // Start Timer3
}
//-----------------------------------------------------------------------------
// PORT_Init
//-----------------------------------------------------------------------------
//
// Return Value : None
// Parameters : None
//
// Configure the Crossbar and GPIO ports.
//
// P0.0 digital open-drain SMBus SDA
// P0.1 digital open-drain SMBus SCL
//
// P3.3 digital push-pull LED
//
// all other port pins unused
//
void PORT_Init (void)
{
P0MDOUT = 0x00; // All P0 pins open-drain output
P3MDOUT |= 0x08; // Make the LED (P3.3) a push-pull
// output
XBR0 = 0x04; // Enable SMBus pins
XBR1 = 0x40; // Enable crossbar and weak pull-ups
P0 = 0xFF;
}
//-----------------------------------------------------------------------------
// Interrupt Service Routines
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
// SMBus Interrupt Service Routine (ISR)
//-----------------------------------------------------------------------------
//
// SMBus ISR state machine
// - Slave only implementation - no master states defined
// - All incoming data is written to global variable <SMB_DATA>
// - All outgoing data is read from global variable <SMB_DATA>
//
void SMBus_ISR (void) interrupt 7
{
if (ARBLOST == 0)
{
switch (SMB0CN & 0xF0) // Decode the SMBus status vector
{
// Slave Receiver: Start+Address received
case SMB_SRADD:
STA = 0; // Clear STA bit
if((SMB0DAT&0xFE) == (SLAVE_ADDR&0xFE)) // Decode address
{ // If the received address matches,
ACK = 1; // ACK the received slave address
if((SMB0DAT&0x01) == READ) // If the transfer is a master READ,
{
SMB0DAT = SMB_DATA; // Prepare outgoing byte
}
}
else // If received slave address does not
{ // match,
ACK = 0; // NACK received address
}
break;
// Slave Receiver: Data received
case SMB_SRDB:
SMB_DATA = SMB0DAT; // Store incoming data
DATA_READY = 1; // Indicate new data received
ACK = 1; // ACK received data
break;
// Slave Receiver: Stop received while either a Slave Receiver or
// Slave Transmitter
case SMB_SRSTO:
STO = 0; // STO must be cleared by software when
// a STOP is detected as a slave
break;
// Slave Transmitter: Data byte transmitted
case SMB_STDB:
// No action required;
// one-byte transfers
// only for this example
break;
// Slave Transmitter: Arbitration lost, Stop detected
//
// This state will only be entered on a bus error condition.
// In normal operation, the slave is no longer sending data or has
// data pending when a STOP is received from the master, so the TXMODE
// bit is cleared and the slave goes to the SRSTO state.
case SMB_STSTO:
STO = 0; // STO must be cleared by software when
// a STOP is detected as a slave
break;
// Default: all other cases undefined
default:
SMB0CF &= ~0x80; // Reset communication
SMB0CF |= 0x80;
STA = 0;
STO = 0;
ACK = 0;
break;
}
}
// ARBLOST = 1, Abort failed transfer
else
{
STA = 0;
STO = 0;
ACK = 0;
}
SI = 0; // Clear SMBus interrupt flag
}
//-----------------------------------------------------------------------------
// Timer3 Interrupt Service Routine (ISR)
//-----------------------------------------------------------------------------
//
// A Timer3 interrupt indicates an SMBus SCL low timeout.
// The SMBus is disabled and re-enabled here
//
void Timer3_ISR (void) interrupt 14
{
SMB0CF &= ~0x80; // Disable SMBus
SMB0CF |= 0x80; // Re-enable SMBus
TMR3CN &= ~0x80; // Clear Timer3 interrupt-pending flag
}
//-----------------------------------------------------------------------------
// End Of File
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